RRAM-based CAM combined with time-domain circuits for hyperdimensional computing

Abstract Content addressable memory (CAM) for search and match operations demands high speed and low power for near real-time decision-making across many critical domains. Resistive RAM (RRAM)-based in-memory computing has high potential in realizing an efficient static CAM for artificial intelligen...

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Autores principales:	Yasmin Halawani, Dima Kilani, Eman Hassan, Huruy Tesfai, Hani Saleh, Baker Mohammad
Formato:	article
Lenguaje:	EN
Publicado:	Nature Portfolio 2021
Materias:	Medicine R Science Q
Acceso en línea:	https://doaj.org/article/0983ba317a5a4bfca0809e744f45e120
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spelling	oai:doaj.org-article:0983ba317a5a4bfca0809e744f45e1202021-12-02T16:56:48ZRRAM-based CAM combined with time-domain circuits for hyperdimensional computing10.1038/s41598-021-99000-w2045-2322https://doaj.org/article/0983ba317a5a4bfca0809e744f45e1202021-10-01T00:00:00Zhttps://doi.org/10.1038/s41598-021-99000-whttps://doaj.org/toc/2045-2322Abstract Content addressable memory (CAM) for search and match operations demands high speed and low power for near real-time decision-making across many critical domains. Resistive RAM (RRAM)-based in-memory computing has high potential in realizing an efficient static CAM for artificial intelligence tasks, especially on resource-constrained platforms. This paper presents an XNOR-based RRAM-CAM with a time-domain analog adder for efficient winning class computation. The CAM compares two operands, one voltage and the second one resistance, and outputs a voltage proportional to the similarity between the input query and the pre-stored patterns. Processing the summation of the output similarity voltages in the time-domain helps avoid voltage saturation, variation, and noise dominating the analog voltage-based computing. After that, to determine the winning class among the multiple classes, a digital realization is utilized to consider the class with the longest pulse width as the winning class. As a demonstrator, hyperdimensional computing for efficient MNIST classification is considered. The proposed design uses 65 nm CMOS foundry technology and realistic data for RRAM with total area of 0.0077 mm2, consumes 13.6 pJ of energy per 1 k query within 10 ns clock cycle. It shows a reduction of ~ 31 × in area and ~ 3 × in energy consumption compared to fully digital ASIC implementation using 65 nm foundry technology. The proposed design exhibits a remarkable reduction in area and energy compared to two of the state-of-the-art RRAM designs.Yasmin HalawaniDima KilaniEman HassanHuruy TesfaiHani SalehBaker MohammadNature PortfolioarticleMedicineRScienceQENScientific Reports, Vol 11, Iss 1, Pp 1-11 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	Medicine R Science Q
spellingShingle	Medicine R Science Q Yasmin Halawani Dima Kilani Eman Hassan Huruy Tesfai Hani Saleh Baker Mohammad RRAM-based CAM combined with time-domain circuits for hyperdimensional computing
description	Abstract Content addressable memory (CAM) for search and match operations demands high speed and low power for near real-time decision-making across many critical domains. Resistive RAM (RRAM)-based in-memory computing has high potential in realizing an efficient static CAM for artificial intelligence tasks, especially on resource-constrained platforms. This paper presents an XNOR-based RRAM-CAM with a time-domain analog adder for efficient winning class computation. The CAM compares two operands, one voltage and the second one resistance, and outputs a voltage proportional to the similarity between the input query and the pre-stored patterns. Processing the summation of the output similarity voltages in the time-domain helps avoid voltage saturation, variation, and noise dominating the analog voltage-based computing. After that, to determine the winning class among the multiple classes, a digital realization is utilized to consider the class with the longest pulse width as the winning class. As a demonstrator, hyperdimensional computing for efficient MNIST classification is considered. The proposed design uses 65 nm CMOS foundry technology and realistic data for RRAM with total area of 0.0077 mm2, consumes 13.6 pJ of energy per 1 k query within 10 ns clock cycle. It shows a reduction of ~ 31 × in area and ~ 3 × in energy consumption compared to fully digital ASIC implementation using 65 nm foundry technology. The proposed design exhibits a remarkable reduction in area and energy compared to two of the state-of-the-art RRAM designs.
format	article
author	Yasmin Halawani Dima Kilani Eman Hassan Huruy Tesfai Hani Saleh Baker Mohammad
author_facet	Yasmin Halawani Dima Kilani Eman Hassan Huruy Tesfai Hani Saleh Baker Mohammad
author_sort	Yasmin Halawani
title	RRAM-based CAM combined with time-domain circuits for hyperdimensional computing
title_short	RRAM-based CAM combined with time-domain circuits for hyperdimensional computing
title_full	RRAM-based CAM combined with time-domain circuits for hyperdimensional computing
title_fullStr	RRAM-based CAM combined with time-domain circuits for hyperdimensional computing
title_full_unstemmed	RRAM-based CAM combined with time-domain circuits for hyperdimensional computing
title_sort	rram-based cam combined with time-domain circuits for hyperdimensional computing
publisher	Nature Portfolio
publishDate	2021
url	https://doaj.org/article/0983ba317a5a4bfca0809e744f45e120
work_keys_str_mv	AT yasminhalawani rrambasedcamcombinedwithtimedomaincircuitsforhyperdimensionalcomputing AT dimakilani rrambasedcamcombinedwithtimedomaincircuitsforhyperdimensionalcomputing AT emanhassan rrambasedcamcombinedwithtimedomaincircuitsforhyperdimensionalcomputing AT huruytesfai rrambasedcamcombinedwithtimedomaincircuitsforhyperdimensionalcomputing AT hanisaleh rrambasedcamcombinedwithtimedomaincircuitsforhyperdimensionalcomputing AT bakermohammad rrambasedcamcombinedwithtimedomaincircuitsforhyperdimensionalcomputing
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RRAM-based CAM combined with time-domain circuits for hyperdimensional computing

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