Steep Subthreshold Swing and Enhanced Illumination Stability InGaZnO Thin-Film Transistor by Plasma Oxidation on Silicon Nitride Gate Dielectric
In this paper, an InGaZnO thin-film transistor (TFT) based on plasma oxidation of silicon nitride (SiN<sub>x</sub>) gate dielectric with small subthreshold swing (SS) and enhanced stability under negative bias illumination stress (NBIS) have been investigated in detail. The mechanism of...
Guardado en:
Autores principales: | , , , , , , |
---|---|
Formato: | article |
Lenguaje: | EN |
Publicado: |
MDPI AG
2021
|
Materias: | |
Acceso en línea: | https://doaj.org/article/0cca4dc1b7b749e685b0287fe2b32eb8 |
Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
Sumario: | In this paper, an InGaZnO thin-film transistor (TFT) based on plasma oxidation of silicon nitride (SiN<sub>x</sub>) gate dielectric with small subthreshold swing (SS) and enhanced stability under negative bias illumination stress (NBIS) have been investigated in detail. The mechanism of the high-performance InGaZnO TFT with plasma-oxidized SiN<sub>x</sub> gate dielectric was also explored. The X-ray photoelectron spectroscopy (XPS) results confirmed that an oxygen-rich layer formed on the surface of the SiN<sub>x</sub> layer and the amount of oxygen vacancy near the interface between SiN<sub>x</sub> and InGaZnO layer was suppressed via pre-implanted oxygen on SiN<sub>x</sub> gate dielectric before deposition of the InGaZnO channel layer. Moreover, the conductance method was employed to directly extract the density of the interface trap (<i>D<sub>it</sub></i>) in InGaZnO TFT to verify the reduction in oxygen vacancy after plasma oxidation. The proposed InGaZnO TFT with plasma oxidation exhibited a field-effect mobility of 16.46 cm<sup>2</sup>/V·s, threshold voltage (<i>V<sub>th</sub></i>) of −0.10 V, <i>I<sub>on</sub></i>/<i>I<sub>off</sub></i> over 10<sup>8</sup>, SS of 97 mV/decade, and <i>V<sub>th</sub></i> shift of −0.37 V after NBIS. The plasma oxidation on SiN<sub>x</sub> gate dielectric provides a novel approach for suppressing the interface trap for high-performance InGaZnO TFT. |
---|