Circuit centric quantum architecture design

Abstract With the development in the field of quantum physics, several methods for building a quantum computer have emerged. These differ in qubit technologies, interaction topologies, and noise characteristics. In this article, insights are given into the circuit‐centric architecture design of Nois...

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Autores principales:	Utkarsh Azad, Ankit Papneja, Rakesh Saini, Bikash K. Behera, Prasanta K. Panigrahi
Formato:	article
Lenguaje:	EN
Publicado:	Wiley 2021
Materias:	Telecommunication TK5101-6720
Acceso en línea:	https://doaj.org/article/11cfed6ccd0547fabb628dc5e655ef83
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id	oai:doaj.org-article:11cfed6ccd0547fabb628dc5e655ef83
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spelling	oai:doaj.org-article:11cfed6ccd0547fabb628dc5e655ef832021-11-22T16:30:12ZCircuit centric quantum architecture design2632-892510.1049/qtc2.12004https://doaj.org/article/11cfed6ccd0547fabb628dc5e655ef832021-03-01T00:00:00Zhttps://doi.org/10.1049/qtc2.12004https://doaj.org/toc/2632-8925Abstract With the development in the field of quantum physics, several methods for building a quantum computer have emerged. These differ in qubit technologies, interaction topologies, and noise characteristics. In this article, insights are given into the circuit‐centric architecture design of Noisy Intermediate‐Scale Quantum (NISQ) devices. The dependence of the circuit size, circuit depth on the interaction and connection between different qubits present in quantum hardware are discussed. A noise‐aware procedure is presented which helps in determining the optimal interactions between different qubits of a quantum chip to execute a given circuit in the most efficient way possible. In this article, the 5‐qubit hardware in a noiseless setting is illustrated with an example. Also, a benchmark‐driven analysis is performed to show the importance of noise adaptivity in determining the hardware reliability. It is concluded that a generalized and flexible procedure such as this approach can aid in determining the design of hardware accurately for which the circuit runs efficiently, that is, with the least number of clock cycles, the lowest gate operations, and noise‐based errors.Utkarsh AzadAnkit PapnejaRakesh SainiBikash K. BeheraPrasanta K. PanigrahiWileyarticleTelecommunicationTK5101-6720ENIET Quantum Communication, Vol 2, Iss 1, Pp 14-25 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	Telecommunication TK5101-6720
spellingShingle	Telecommunication TK5101-6720 Utkarsh Azad Ankit Papneja Rakesh Saini Bikash K. Behera Prasanta K. Panigrahi Circuit centric quantum architecture design
description	Abstract With the development in the field of quantum physics, several methods for building a quantum computer have emerged. These differ in qubit technologies, interaction topologies, and noise characteristics. In this article, insights are given into the circuit‐centric architecture design of Noisy Intermediate‐Scale Quantum (NISQ) devices. The dependence of the circuit size, circuit depth on the interaction and connection between different qubits present in quantum hardware are discussed. A noise‐aware procedure is presented which helps in determining the optimal interactions between different qubits of a quantum chip to execute a given circuit in the most efficient way possible. In this article, the 5‐qubit hardware in a noiseless setting is illustrated with an example. Also, a benchmark‐driven analysis is performed to show the importance of noise adaptivity in determining the hardware reliability. It is concluded that a generalized and flexible procedure such as this approach can aid in determining the design of hardware accurately for which the circuit runs efficiently, that is, with the least number of clock cycles, the lowest gate operations, and noise‐based errors.
format	article
author	Utkarsh Azad Ankit Papneja Rakesh Saini Bikash K. Behera Prasanta K. Panigrahi
author_facet	Utkarsh Azad Ankit Papneja Rakesh Saini Bikash K. Behera Prasanta K. Panigrahi
author_sort	Utkarsh Azad
title	Circuit centric quantum architecture design
title_short	Circuit centric quantum architecture design
title_full	Circuit centric quantum architecture design
title_fullStr	Circuit centric quantum architecture design
title_full_unstemmed	Circuit centric quantum architecture design
title_sort	circuit centric quantum architecture design
publisher	Wiley
publishDate	2021
url	https://doaj.org/article/11cfed6ccd0547fabb628dc5e655ef83
work_keys_str_mv	AT utkarshazad circuitcentricquantumarchitecturedesign AT ankitpapneja circuitcentricquantumarchitecturedesign AT rakeshsaini circuitcentricquantumarchitecturedesign AT bikashkbehera circuitcentricquantumarchitecturedesign AT prasantakpanigrahi circuitcentricquantumarchitecturedesign
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Circuit centric quantum architecture design

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