Low Cost Hardware Back Propagation Algorithm

The first successful implementation of Artificial Neural Networks (ANNs) was published a little over a decade ago. It is time to review the progress that has been made in this research area. This paper provides taxonomy for classifying Field Programmable Gate Arrays (FPGAs) implementation of ANNs....

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Autor principal:	Ammar A. Hassan
Formato:	article
Lenguaje:	EN
Publicado:	Al-Khwarizmi College of Engineering – University of Baghdad 2007
Materias:	Chemical engineering TP155-156 Engineering (General). Civil engineering (General) TA1-2040
Acceso en línea:	https://doaj.org/article/12b7668090ed4952ba88e402e2067f98
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id	oai:doaj.org-article:12b7668090ed4952ba88e402e2067f98
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spelling	oai:doaj.org-article:12b7668090ed4952ba88e402e2067f982021-12-02T03:01:50ZLow Cost Hardware Back Propagation Algorithm1818-11712312-0789https://doaj.org/article/12b7668090ed4952ba88e402e2067f982007-03-01T00:00:00Zhttp://alkej.uobaghdad.edu.iq/index.php/alkej/article/view/622https://doaj.org/toc/1818-1171https://doaj.org/toc/2312-0789 The first successful implementation of Artificial Neural Networks (ANNs) was published a little over a decade ago. It is time to review the progress that has been made in this research area. This paper provides taxonomy for classifying Field Programmable Gate Arrays (FPGAs) implementation of ANNs. Different implementation techniques and design issues are discussed, such as obtaining a suitable activation function and numerical truncation technique trade-off, the improvement of the learning algorithm to reduce the cost of neuron and in result the total cost and the total speed of the complete ANN. Finally, the implementation of a complete very fast circuit for the pattern of English Digit Numbers NN has four layers of 70 nodes (neurons) on single chip using Xilinx FPGA technique is given. The main goal of this paper is how to achieve the suitable activation function and weights for this network that gives minimum hardware cost when all stages of this ANN algorithm is implemented on FPGA. Ammar A. HassanAl-Khwarizmi College of Engineering – University of BaghdadarticleChemical engineeringTP155-156Engineering (General). Civil engineering (General)TA1-2040ENAl-Khawarizmi Engineering Journal, Vol 3, Iss 1 (2007)
institution	DOAJ
collection	DOAJ
language	EN
topic	Chemical engineering TP155-156 Engineering (General). Civil engineering (General) TA1-2040
spellingShingle	Chemical engineering TP155-156 Engineering (General). Civil engineering (General) TA1-2040 Ammar A. Hassan Low Cost Hardware Back Propagation Algorithm
description	The first successful implementation of Artificial Neural Networks (ANNs) was published a little over a decade ago. It is time to review the progress that has been made in this research area. This paper provides taxonomy for classifying Field Programmable Gate Arrays (FPGAs) implementation of ANNs. Different implementation techniques and design issues are discussed, such as obtaining a suitable activation function and numerical truncation technique trade-off, the improvement of the learning algorithm to reduce the cost of neuron and in result the total cost and the total speed of the complete ANN. Finally, the implementation of a complete very fast circuit for the pattern of English Digit Numbers NN has four layers of 70 nodes (neurons) on single chip using Xilinx FPGA technique is given. The main goal of this paper is how to achieve the suitable activation function and weights for this network that gives minimum hardware cost when all stages of this ANN algorithm is implemented on FPGA.
format	article
author	Ammar A. Hassan
author_facet	Ammar A. Hassan
author_sort	Ammar A. Hassan
title	Low Cost Hardware Back Propagation Algorithm
title_short	Low Cost Hardware Back Propagation Algorithm
title_full	Low Cost Hardware Back Propagation Algorithm
title_fullStr	Low Cost Hardware Back Propagation Algorithm
title_full_unstemmed	Low Cost Hardware Back Propagation Algorithm
title_sort	low cost hardware back propagation algorithm
publisher	Al-Khwarizmi College of Engineering – University of Baghdad
publishDate	2007
url	https://doaj.org/article/12b7668090ed4952ba88e402e2067f98
work_keys_str_mv	AT ammarahassan lowcosthardwarebackpropagationalgorithm
_version_	1718401964147998720

Low Cost Hardware Back Propagation Algorithm

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