Novel Boosting Scheme Using Asymmetric Pass Voltage for Reducing Program Disturbance in 3-Dimensional NAND Flash Memory

In this paper, novel boosting scheme using asymmetric pass voltage (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula>) is proposed to obtain high channel boosting potential and to reduce program disturbance in 3-D N...

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Autores principales: Dae Woong Kwon, Junil Lee, Sihyun Kim, Ryoongbin Lee, Sangwan Kim, Jong-Ho Lee, Byung-Gook Park
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Publicado: IEEE 2018
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spelling oai:doaj.org-article:1cbf20fdf1714e2684c1801d4c0dbd6f2021-11-19T00:00:37ZNovel Boosting Scheme Using Asymmetric Pass Voltage for Reducing Program Disturbance in 3-Dimensional NAND Flash Memory2168-673410.1109/JEDS.2018.2801219https://doaj.org/article/1cbf20fdf1714e2684c1801d4c0dbd6f2018-01-01T00:00:00Zhttps://ieeexplore.ieee.org/document/8279400/https://doaj.org/toc/2168-6734In this paper, novel boosting scheme using asymmetric pass voltage (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula>) is proposed to obtain high channel boosting potential and to reduce program disturbance in 3-D NAND flash memory. The proposed scheme has the same program bias and timing conditions as conventional self-boosting except for <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula> voltages applied to both adjacent word-lines of selected word-line (WL<sub>sel</sub>). Reduced <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass1}} =\,\,\text{V}_{\mathrm{ pass}} - {\Delta }\text{V}$ </tex-math></inline-formula>) is applied to previous word-line (WL<inline-formula> <tex-math notation="LaTeX">$_{\rm n-{1}}$ </tex-math></inline-formula>) of WL<sub>sel</sub> and increased <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass2}} =\,\,\text{V}_{\mathrm{ pass}}+{\Delta }\text{V}$ </tex-math></inline-formula>) is applied to next word-line (WL<inline-formula> <tex-math notation="LaTeX">$_{\rm n+{1}}$ </tex-math></inline-formula>). In this scheme, the <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass1}}$ </tex-math></inline-formula> cuts the channel off and causes local boosting when the channel potentials of inhibit strings are boosted up. Meanwhile, the <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass2}}$ </tex-math></inline-formula> compensates the program speed reduction of selected cell (cell<sub>sel</sub>) induced by the decreased voltage of the <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass1}}$ </tex-math></inline-formula>. Through the measurements of program disturbance in fabricated devices, it is revealed that the program disturbance is significantly improved without the reduction of program speed by the proposed scheme. Furthermore, the <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass1}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass2}}$ </tex-math></inline-formula> are optimized to maximize the improvement.Dae Woong KwonJunil LeeSihyun KimRyoongbin LeeSangwan KimJong-Ho LeeByung-Gook ParkIEEEarticle3-D NAND flash memoryasymmetric pass voltagelocal-boosting schemeprogram disturbanceElectrical engineering. Electronics. Nuclear engineeringTK1-9971ENIEEE Journal of the Electron Devices Society, Vol 6, Pp 286-290 (2018)
institution DOAJ
collection DOAJ
language EN
topic 3-D NAND flash memory
asymmetric pass voltage
local-boosting scheme
program disturbance
Electrical engineering. Electronics. Nuclear engineering
TK1-9971
spellingShingle 3-D NAND flash memory
asymmetric pass voltage
local-boosting scheme
program disturbance
Electrical engineering. Electronics. Nuclear engineering
TK1-9971
Dae Woong Kwon
Junil Lee
Sihyun Kim
Ryoongbin Lee
Sangwan Kim
Jong-Ho Lee
Byung-Gook Park
Novel Boosting Scheme Using Asymmetric Pass Voltage for Reducing Program Disturbance in 3-Dimensional NAND Flash Memory
description In this paper, novel boosting scheme using asymmetric pass voltage (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula>) is proposed to obtain high channel boosting potential and to reduce program disturbance in 3-D NAND flash memory. The proposed scheme has the same program bias and timing conditions as conventional self-boosting except for <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula> voltages applied to both adjacent word-lines of selected word-line (WL<sub>sel</sub>). Reduced <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass1}} =\,\,\text{V}_{\mathrm{ pass}} - {\Delta }\text{V}$ </tex-math></inline-formula>) is applied to previous word-line (WL<inline-formula> <tex-math notation="LaTeX">$_{\rm n-{1}}$ </tex-math></inline-formula>) of WL<sub>sel</sub> and increased <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass}}$ </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass2}} =\,\,\text{V}_{\mathrm{ pass}}+{\Delta }\text{V}$ </tex-math></inline-formula>) is applied to next word-line (WL<inline-formula> <tex-math notation="LaTeX">$_{\rm n+{1}}$ </tex-math></inline-formula>). In this scheme, the <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass1}}$ </tex-math></inline-formula> cuts the channel off and causes local boosting when the channel potentials of inhibit strings are boosted up. Meanwhile, the <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass2}}$ </tex-math></inline-formula> compensates the program speed reduction of selected cell (cell<sub>sel</sub>) induced by the decreased voltage of the <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass1}}$ </tex-math></inline-formula>. Through the measurements of program disturbance in fabricated devices, it is revealed that the program disturbance is significantly improved without the reduction of program speed by the proposed scheme. Furthermore, the <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass1}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$\text{V}_{\mathrm{ pass2}}$ </tex-math></inline-formula> are optimized to maximize the improvement.
format article
author Dae Woong Kwon
Junil Lee
Sihyun Kim
Ryoongbin Lee
Sangwan Kim
Jong-Ho Lee
Byung-Gook Park
author_facet Dae Woong Kwon
Junil Lee
Sihyun Kim
Ryoongbin Lee
Sangwan Kim
Jong-Ho Lee
Byung-Gook Park
author_sort Dae Woong Kwon
title Novel Boosting Scheme Using Asymmetric Pass Voltage for Reducing Program Disturbance in 3-Dimensional NAND Flash Memory
title_short Novel Boosting Scheme Using Asymmetric Pass Voltage for Reducing Program Disturbance in 3-Dimensional NAND Flash Memory
title_full Novel Boosting Scheme Using Asymmetric Pass Voltage for Reducing Program Disturbance in 3-Dimensional NAND Flash Memory
title_fullStr Novel Boosting Scheme Using Asymmetric Pass Voltage for Reducing Program Disturbance in 3-Dimensional NAND Flash Memory
title_full_unstemmed Novel Boosting Scheme Using Asymmetric Pass Voltage for Reducing Program Disturbance in 3-Dimensional NAND Flash Memory
title_sort novel boosting scheme using asymmetric pass voltage for reducing program disturbance in 3-dimensional nand flash memory
publisher IEEE
publishDate 2018
url https://doaj.org/article/1cbf20fdf1714e2684c1801d4c0dbd6f
work_keys_str_mv AT daewoongkwon novelboostingschemeusingasymmetricpassvoltageforreducingprogramdisturbancein3dimensionalnandflashmemory
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AT sihyunkim novelboostingschemeusingasymmetricpassvoltageforreducingprogramdisturbancein3dimensionalnandflashmemory
AT ryoongbinlee novelboostingschemeusingasymmetricpassvoltageforreducingprogramdisturbancein3dimensionalnandflashmemory
AT sangwankim novelboostingschemeusingasymmetricpassvoltageforreducingprogramdisturbancein3dimensionalnandflashmemory
AT jongholee novelboostingschemeusingasymmetricpassvoltageforreducingprogramdisturbancein3dimensionalnandflashmemory
AT byunggookpark novelboostingschemeusingasymmetricpassvoltageforreducingprogramdisturbancein3dimensionalnandflashmemory
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