Design of a BIST implemented AES crypto-processor ASIC.
This paper presents the design of a Built-in-self-Test (BIST) implemented Advanced Encryption Standard (AES) cryptoprocessor Application Specific Integrated Circuit (ASIC). AES has been proved as the strongest symmetric encryption algorithm declared by USA Govt. and it outperforms all other existing...
Saved in:
Main Authors: | Md Liakot Ali, Md Shazzatur Rahman, Fakir Sharif Hossain |
---|---|
Format: | article |
Language: | EN |
Published: |
Public Library of Science (PLoS)
2021
|
Subjects: | |
Online Access: | https://doaj.org/article/29a3abaf94e446f3b4281dad1f69d446 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Design of a BIST implemented AES crypto-processor ASIC
by: Md. Liakot Ali, et al.
Published: (2021) -
Area efficient camouflaging technique for securing IC reverse engineering.
by: Md Liakot Ali, et al.
Published: (2021) -
Area efficient camouflaging technique for securing IC reverse engineering
by: Md. Liakot Ali, et al.
Published: (2021) -
Corrigendum: Throughput/area optimised pipelined architecture for elliptic curve crypto processor
by: Rashid Muhammad
Published: (2021) -
Dual actions of Psalmotoxin at ASIC1a and ASIC2a heteromeric channels (ASIC1a/2a)
by: Yi Liu, et al.
Published: (2018)