A hardware Markov chain algorithm realized in a single device for machine learning
Despite the need to develop resistive random access memory (RRAM) devices for machine learning, RRAM array-based hardware methods for algorithm require external electronics. Here, the authors realize a Markov chain algorithm in a single 2D multilayer SnSe device without external electronics.
Guardado en:
Autores principales: | He Tian, Xue-Feng Wang, Mohammad Ali Mohammad, Guang-Yang Gou, Fan Wu, Yi Yang, Tian-Ling Ren |
---|---|
Formato: | article |
Lenguaje: | EN |
Publicado: |
Nature Portfolio
2018
|
Materias: | |
Acceso en línea: | https://doaj.org/article/3173eaec956a4ae69aff4e96e2e2008e |
Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
Ejemplares similares
-
Low Cost Hardware Back Propagation Algorithm
por: Ammar A. Hassan
Publicado: (2007) -
Low Cost Hardware Back Propagation Algorithm
por: Ammarx A. Hassan
Publicado: (2017) -
Low Cost Hardware Back Propagation Algorithm
por: Ammar A. Hassan
Publicado: (2007) -
Hamiltonian simulation algorithms for near-term quantum hardware
por: Laura Clinton, et al.
Publicado: (2021) -
High-speed devices for modular reduction with minimal hardware costs
por: S. Tynymbayev, et al.
Publicado: (2019)