A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications

Analog compute-in-memory with resistive random access memory (RRAM) devices promises to overcome the data movement bottleneck in data-intensive artificial intelligence (AI) and machine learning. RRAM crossbar arrays improve the efficiency of vector-matrix multiplications (VMMs), which is a vital ope...

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Autores principales:	Justin M. Correll, Vishishtha Bothra, Fuxi Cai, Yong Lim, Seung Hwan Lee, Seungjong Lee, Wei D. Lu, Zhengya Zhang, Michael P. Flynn
Formato:	article
Lenguaje:	EN
Publicado:	IEEE 2020
Materias:	ADC analog compute-in-memory DAC resistive random access memory (RRAM) vector-matrix multiplication (VMM) Computer engineering. Computer hardware TK7885-7895
Acceso en línea:	https://doaj.org/article/3d1d7a52eebe4f4f88627fff7858e676
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spelling	oai:doaj.org-article:3d1d7a52eebe4f4f88627fff7858e6762021-11-19T00:07:07ZA Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications2329-923110.1109/JXCDC.2020.2992228https://doaj.org/article/3d1d7a52eebe4f4f88627fff7858e6762020-01-01T00:00:00Zhttps://ieeexplore.ieee.org/document/9085353/https://doaj.org/toc/2329-9231Analog compute-in-memory with resistive random access memory (RRAM) devices promises to overcome the data movement bottleneck in data-intensive artificial intelligence (AI) and machine learning. RRAM crossbar arrays improve the efficiency of vector-matrix multiplications (VMMs), which is a vital operation in these applications. The prototype IC is the first complete, fully integrated analog-RRAM CMOS coprocessor. This article focuses on the digital and analog circuitry that supports efficient and flexible RRAM-based computation. A passive <inline-formula> <tex-math notation="LaTeX">$54\times108$ </tex-math></inline-formula> RRAM crossbar array performs VMM in the analog domain. Specialized mixed-signal circuits stimulate and read the outputs of the RRAM crossbar. The single-chip CMOS prototype includes a reduced instruction set computer (RISC) processor interfaced to a memory-mapped mixed-signal core. In the mixed-signal core, ADCs and DACs interface with the passive RRAM crossbar. The RISC processor controls the mixed-signal circuits and the algorithm data path. The system is fully programmable and supports forward and backward propagation. As proof of concept, a fully integrated 0.18- <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS prototype with a postprocessed RRAM array demonstrates several key functions of machine learning, including online learning. The mixed-signal core consumes 64 mW at an operating frequency of 148 MHz. The total system power consumption considering the mixed-signal circuitry, the digital processor, and the passive RRAM array is 307 mW. The maximum theoretical throughput is 2.6 GOPS at an efficiency of 8.5 GOPS/W.Justin M. CorrellVishishtha BothraFuxi CaiYong LimSeung Hwan LeeSeungjong LeeWei D. LuZhengya ZhangMichael P. FlynnIEEEarticleADCanalogcompute-in-memoryDACresistive random access memory (RRAM)vector-matrix multiplication (VMM)Computer engineering. Computer hardwareTK7885-7895ENIEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 6, Iss 1, Pp 36-44 (2020)
institution	DOAJ
collection	DOAJ
language	EN
topic	ADC analog compute-in-memory DAC resistive random access memory (RRAM) vector-matrix multiplication (VMM) Computer engineering. Computer hardware TK7885-7895
spellingShingle	ADC analog compute-in-memory DAC resistive random access memory (RRAM) vector-matrix multiplication (VMM) Computer engineering. Computer hardware TK7885-7895 Justin M. Correll Vishishtha Bothra Fuxi Cai Yong Lim Seung Hwan Lee Seungjong Lee Wei D. Lu Zhengya Zhang Michael P. Flynn A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications
description	Analog compute-in-memory with resistive random access memory (RRAM) devices promises to overcome the data movement bottleneck in data-intensive artificial intelligence (AI) and machine learning. RRAM crossbar arrays improve the efficiency of vector-matrix multiplications (VMMs), which is a vital operation in these applications. The prototype IC is the first complete, fully integrated analog-RRAM CMOS coprocessor. This article focuses on the digital and analog circuitry that supports efficient and flexible RRAM-based computation. A passive <inline-formula> <tex-math notation="LaTeX">$54\times108$ </tex-math></inline-formula> RRAM crossbar array performs VMM in the analog domain. Specialized mixed-signal circuits stimulate and read the outputs of the RRAM crossbar. The single-chip CMOS prototype includes a reduced instruction set computer (RISC) processor interfaced to a memory-mapped mixed-signal core. In the mixed-signal core, ADCs and DACs interface with the passive RRAM crossbar. The RISC processor controls the mixed-signal circuits and the algorithm data path. The system is fully programmable and supports forward and backward propagation. As proof of concept, a fully integrated 0.18- <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS prototype with a postprocessed RRAM array demonstrates several key functions of machine learning, including online learning. The mixed-signal core consumes 64 mW at an operating frequency of 148 MHz. The total system power consumption considering the mixed-signal circuitry, the digital processor, and the passive RRAM array is 307 mW. The maximum theoretical throughput is 2.6 GOPS at an efficiency of 8.5 GOPS/W.
format	article
author	Justin M. Correll Vishishtha Bothra Fuxi Cai Yong Lim Seung Hwan Lee Seungjong Lee Wei D. Lu Zhengya Zhang Michael P. Flynn
author_facet	Justin M. Correll Vishishtha Bothra Fuxi Cai Yong Lim Seung Hwan Lee Seungjong Lee Wei D. Lu Zhengya Zhang Michael P. Flynn
author_sort	Justin M. Correll
title	A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications
title_short	A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications
title_full	A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications
title_fullStr	A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications
title_full_unstemmed	A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications
title_sort	fully integrated reprogrammable cmos-rram compute-in-memory coprocessor for neuromorphic applications
publisher	IEEE
publishDate	2020
url	https://doaj.org/article/3d1d7a52eebe4f4f88627fff7858e676
work_keys_str_mv	AT justinmcorrell afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT vishishthabothra afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT fuxicai afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT yonglim afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT seunghwanlee afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT seungjonglee afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT weidlu afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT zhengyazhang afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT michaelpflynn afullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT justinmcorrell fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT vishishthabothra fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT fuxicai fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT yonglim fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT seunghwanlee fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT seungjonglee fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT weidlu fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT zhengyazhang fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications AT michaelpflynn fullyintegratedreprogrammablecmosrramcomputeinmemorycoprocessorforneuromorphicapplications
_version_	1718420603902361600

A Fully Integrated Reprogrammable CMOS-RRAM Compute-in-Memory Coprocessor for Neuromorphic Applications

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