Analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths

Abstract Generally, a conventional voltage doubler circuit possesses a large variation of its input impedance over the bandwidth, which results in limited bandwidth and low RF-dc conversion efficiency. A basic aspect for designing wideband voltage doubler rectifiers is the use of complex matching ci...

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Autores principales:	Babita Gyawali, Samundra K. Thapa, Adel Barakat, Kuniaki Yoshitomi, Ramesh K. Pokharel
Formato:	article
Lenguaje:	EN
Publicado:	Nature Portfolio 2021
Materias:	Medicine R Science Q
Acceso en línea:	https://doaj.org/article/5203c29c7bc24eb287da3bd7da917f4a
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spelling	oai:doaj.org-article:5203c29c7bc24eb287da3bd7da917f4a2021-12-02T18:37:12ZAnalysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths10.1038/s41598-021-99405-72045-2322https://doaj.org/article/5203c29c7bc24eb287da3bd7da917f4a2021-10-01T00:00:00Zhttps://doi.org/10.1038/s41598-021-99405-7https://doaj.org/toc/2045-2322Abstract Generally, a conventional voltage doubler circuit possesses a large variation of its input impedance over the bandwidth, which results in limited bandwidth and low RF-dc conversion efficiency. A basic aspect for designing wideband voltage doubler rectifiers is the use of complex matching circuits to achieve decade and octave impedance and RF-dc conversion efficiency bandwidths. Still, the reported techniques till now have been accompanied by a large fluctuation of the RF-dc conversion efficiency over the operating bandwidth. In this paper, we propose a novel rectification circuit with minimal inter-stage matching that consists of a single short-circuit stub and a virtual battery, which contributes negligible losses and overcomes these existing problems. Consequently, the proposed rectifier circuit achieves a diode physical-limit-bandwidth efficient rectification. In other words, the rectification bandwidth, as well as the peak efficiency, are controlled by the length of the stub and the physical limitation of the diodes.Babita GyawaliSamundra K. ThapaAdel BarakatKuniaki YoshitomiRamesh K. PokharelNature PortfolioarticleMedicineRScienceQENScientific Reports, Vol 11, Iss 1, Pp 1-10 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	Medicine R Science Q
spellingShingle	Medicine R Science Q Babita Gyawali Samundra K. Thapa Adel Barakat Kuniaki Yoshitomi Ramesh K. Pokharel Analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths
description	Abstract Generally, a conventional voltage doubler circuit possesses a large variation of its input impedance over the bandwidth, which results in limited bandwidth and low RF-dc conversion efficiency. A basic aspect for designing wideband voltage doubler rectifiers is the use of complex matching circuits to achieve decade and octave impedance and RF-dc conversion efficiency bandwidths. Still, the reported techniques till now have been accompanied by a large fluctuation of the RF-dc conversion efficiency over the operating bandwidth. In this paper, we propose a novel rectification circuit with minimal inter-stage matching that consists of a single short-circuit stub and a virtual battery, which contributes negligible losses and overcomes these existing problems. Consequently, the proposed rectifier circuit achieves a diode physical-limit-bandwidth efficient rectification. In other words, the rectification bandwidth, as well as the peak efficiency, are controlled by the length of the stub and the physical limitation of the diodes.
format	article
author	Babita Gyawali Samundra K. Thapa Adel Barakat Kuniaki Yoshitomi Ramesh K. Pokharel
author_facet	Babita Gyawali Samundra K. Thapa Adel Barakat Kuniaki Yoshitomi Ramesh K. Pokharel
author_sort	Babita Gyawali
title	Analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths
title_short	Analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths
title_full	Analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths
title_fullStr	Analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths
title_full_unstemmed	Analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths
title_sort	analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths
publisher	Nature Portfolio
publishDate	2021
url	https://doaj.org/article/5203c29c7bc24eb287da3bd7da917f4a
work_keys_str_mv	AT babitagyawali analysisanddesignofdiodephysicallimitbandwidthefficientrectificationcircuitformaximumflatefficiencywideimpedanceandefficiencybandwidths AT samundrakthapa analysisanddesignofdiodephysicallimitbandwidthefficientrectificationcircuitformaximumflatefficiencywideimpedanceandefficiencybandwidths AT adelbarakat analysisanddesignofdiodephysicallimitbandwidthefficientrectificationcircuitformaximumflatefficiencywideimpedanceandefficiencybandwidths AT kuniakiyoshitomi analysisanddesignofdiodephysicallimitbandwidthefficientrectificationcircuitformaximumflatefficiencywideimpedanceandefficiencybandwidths AT rameshkpokharel analysisanddesignofdiodephysicallimitbandwidthefficientrectificationcircuitformaximumflatefficiencywideimpedanceandefficiencybandwidths
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Analysis and design of diode physical limit bandwidth efficient rectification circuit for maximum flat efficiency, wide impedance, and efficiency bandwidths

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