A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks

Pattern recognition as a computing task is very well suited for machine learning algorithms utilizing artificial neural networks (ANNs). Computing systems using ANNs usually require some sort of data storage to store the weights and bias values for the processing elements of the individual neurons....

Descripción completa

Guardado en:

Detalles Bibliográficos
Autores principales:	Stefan Pechmann, Timo Mai, Julian Potschka, Daniel Reiser, Peter Reichel, Marco Breiling, Marc Reichenbach, Amelie Hagelauer
Formato:	article
Lenguaje:	EN
Publicado:	MDPI AG 2021
Materias:	ANN low-power embedded memory memory block multi-level RRAM Mechanical engineering and machinery TJ1-1570
Acceso en línea:	https://doaj.org/article/562cb5742c42492f993e25ce25091a4c
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

id	oai:doaj.org-article:562cb5742c42492f993e25ce25091a4c
record_format	dspace
spelling	oai:doaj.org-article:562cb5742c42492f993e25ce25091a4c2021-11-25T18:22:45ZA Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks10.3390/mi121112772072-666Xhttps://doaj.org/article/562cb5742c42492f993e25ce25091a4c2021-10-01T00:00:00Zhttps://www.mdpi.com/2072-666X/12/11/1277https://doaj.org/toc/2072-666XPattern recognition as a computing task is very well suited for machine learning algorithms utilizing artificial neural networks (ANNs). Computing systems using ANNs usually require some sort of data storage to store the weights and bias values for the processing elements of the individual neurons. This paper introduces a memory block using resistive memory cells (RRAM) to realize this weight and bias storage in an embedded and distributed way while also offering programming and multi-level ability. By implementing power gating, overall power consumption is decreased significantly without data loss by taking advantage of the non-volatility of the RRAM technology. Due to the versatility of the peripheral circuitry, the presented memory concept can be adapted to different applications and RRAM technologies.Stefan PechmannTimo MaiJulian PotschkaDaniel ReiserPeter ReichelMarco BreilingMarc ReichenbachAmelie HagelauerMDPI AGarticleANNlow-powerembedded memorymemory blockmulti-levelRRAMMechanical engineering and machineryTJ1-1570ENMicromachines, Vol 12, Iss 1277, p 1277 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	ANN low-power embedded memory memory block multi-level RRAM Mechanical engineering and machinery TJ1-1570
spellingShingle	ANN low-power embedded memory memory block multi-level RRAM Mechanical engineering and machinery TJ1-1570 Stefan Pechmann Timo Mai Julian Potschka Daniel Reiser Peter Reichel Marco Breiling Marc Reichenbach Amelie Hagelauer A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks
description	Pattern recognition as a computing task is very well suited for machine learning algorithms utilizing artificial neural networks (ANNs). Computing systems using ANNs usually require some sort of data storage to store the weights and bias values for the processing elements of the individual neurons. This paper introduces a memory block using resistive memory cells (RRAM) to realize this weight and bias storage in an embedded and distributed way while also offering programming and multi-level ability. By implementing power gating, overall power consumption is decreased significantly without data loss by taking advantage of the non-volatility of the RRAM technology. Due to the versatility of the peripheral circuitry, the presented memory concept can be adapted to different applications and RRAM technologies.
format	article
author	Stefan Pechmann Timo Mai Julian Potschka Daniel Reiser Peter Reichel Marco Breiling Marc Reichenbach Amelie Hagelauer
author_facet	Stefan Pechmann Timo Mai Julian Potschka Daniel Reiser Peter Reichel Marco Breiling Marc Reichenbach Amelie Hagelauer
author_sort	Stefan Pechmann
title	A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks
title_short	A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks
title_full	A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks
title_fullStr	A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks
title_full_unstemmed	A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks
title_sort	low-power rram memory block for embedded, multi-level weight and bias storage in artificial neural networks
publisher	MDPI AG
publishDate	2021
url	https://doaj.org/article/562cb5742c42492f993e25ce25091a4c
work_keys_str_mv	AT stefanpechmann alowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT timomai alowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT julianpotschka alowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT danielreiser alowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT peterreichel alowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT marcobreiling alowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT marcreichenbach alowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT ameliehagelauer alowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT stefanpechmann lowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT timomai lowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT julianpotschka lowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT danielreiser lowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT peterreichel lowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT marcobreiling lowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT marcreichenbach lowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks AT ameliehagelauer lowpowerrrammemoryblockforembeddedmultilevelweightandbiasstorageinartificialneuralnetworks
_version_	1718411257288065024

A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks

Ejemplares similares