Modelling of SEPIC, Ćuk and Zeta Converters in Discontinuous Conduction Mode and Performance Evaluation
High-order switched DC-DC converters, such as SEPIC, Ćuk and Zeta, are classic energy processing elements, which can be used in a wide variety of applications due to their capacity to step-up and/or step-down voltage characteristic. In this paper, a novel methodology for analyzing the previous conve...
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| Autores principales: | , , , , |
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| Formato: | article |
| Lenguaje: | EN |
| Publicado: |
MDPI AG
2021
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| Materias: | |
| Acceso en línea: | https://doaj.org/article/592ba4bb03c2497a90ce0951c75606b9 |
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| Sumario: | High-order switched DC-DC converters, such as SEPIC, Ćuk and Zeta, are classic energy processing elements, which can be used in a wide variety of applications due to their capacity to step-up and/or step-down voltage characteristic. In this paper, a novel methodology for analyzing the previous converters operating in discontinuous conduction mode (DCM) is applied to obtain full-order dynamic models. The analysis is based on the fact that inductor currents have three differentiated operating sub-intervals characterized by a third one in which both currents become equal, which implies that the current flowing through the diode is zero (DCM). Under a small voltage ripple hypothesis, the currents of all three converters have similar current piecewise linear shapes that allow us to use a graphical method based on the triangular shape of the diode current to obtain the respective non-linear average models. The models’ linearization around their steady-state operating points yields full-order small-signal models that reproduce accurately the dynamic behavior of the corresponding switched model. The proposed methodology is applicable to the proposed converters and has also been extended to more complex topologies with magnetic coupling between inductors and/or an <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mi>R</mi><mi>C</mi></mrow></semantics></math></inline-formula> damping network in parallel with the intermediate capacitor. Several tests were carried out using simulation, hardware-in-the-loop, and using an experimental prototype. All the results validate the theoretical models. |
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