Block-Based Compression and Corresponding Hardware Circuits for Sparse Activations
In a CNN (convolutional neural network) accelerator, to reduce memory traffic and power consumption, there is a need to exploit the sparsity of activation values. Therefore, some research efforts have been paid to skip ineffectual computations (i.e., multiplications by zero). Different from previous...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | article |
| Language: | EN |
| Published: |
MDPI AG
2021
|
| Subjects: | |
| Online Access: | https://doaj.org/article/5cf53a5820af40cca4e6ee6645d2bf4d |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|