Energy-Efficient Shared Cache Using Way Prediction Based on Way Access Dominance Detection
To meet the performance demands of chip multiprocessors, chip designers have increased the capacity and hierarchy of cache memories. Accordingly, a shared lower-level cache reduces conflict misses by adopting a multi-way set-associative structure with high associativity. This structure allows fast a...
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| Autores principales: | , |
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| Formato: | article |
| Lenguaje: | EN |
| Publicado: |
IEEE
2021
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| Materias: | |
| Acceso en línea: | https://doaj.org/article/651c5058aa7b4724be14ea67f2319fd5 |
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