A mode-balanced reconfigurable logic gate built in a van der Waals strata

Abstract Two-dimensional (2D) semiconducting materials, in particular transition-metal dichalcogenides, have emerged as the preferred channel materials for sub-5 nm field-effect transistors (FETs). However, the lack of practical doping techniques for these materials poses a significant challenge to...

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Autores principales:	Wei Cao, Jae Hwan Chu, Kamyar Parto, Kaustav Banerjee
Formato:	article
Lenguaje:	EN
Publicado:	Nature Portfolio 2021
Materias:	Materials of engineering and construction. Mechanics of materials TA401-492 Chemistry QD1-999
Acceso en línea:	https://doaj.org/article/6ddcd6ece133465e948e2379bdff4e8c
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spelling	oai:doaj.org-article:6ddcd6ece133465e948e2379bdff4e8c2021-12-02T14:21:30ZA mode-balanced reconfigurable logic gate built in a van der Waals strata10.1038/s41699-020-00198-62397-7132https://doaj.org/article/6ddcd6ece133465e948e2379bdff4e8c2021-02-01T00:00:00Zhttps://doi.org/10.1038/s41699-020-00198-6https://doaj.org/toc/2397-7132Abstract Two-dimensional (2D) semiconducting materials, in particular transition-metal dichalcogenides, have emerged as the preferred channel materials for sub-5 nm field-effect transistors (FETs). However, the lack of practical doping techniques for these materials poses a significant challenge to designing complementary logic gates containing both n- and p-type FETs. Although electrical tuning of the polarity of 2D-FETs can potentially circumvent this problem, such devices suffer from the lack of balanced n- and p-mode transistor performance, forming one of the most enigmatic challenges of the reconfigurable 2D-FET technology. Here we provide a solution to this dilemma by judicious use of van der Waals (vdW) materials consisting of conductors, dielectrics and semiconductors forming a 50 nm thin quantum engineered strata that can guarantee a purely vdW-type interlayer interaction, which faithfully preserves the mid-gap contact design and thereby achieves an intrinsically mode-balanced and fully reconfigurable all-2D logic gate. The intrinsically mode-balanced gate eliminates the need for transistor sizing and allows post-fabrication reconfigurability to the transistor operation mode, simultaneously allowing an ultra-compact footprint and increased circuit functionality, which can be potentially exploited to build more area-efficient and low-cost integrated electronics for the internet of things (IoT) paradigm.Wei CaoJae Hwan ChuKamyar PartoKaustav BanerjeeNature PortfolioarticleMaterials of engineering and construction. Mechanics of materialsTA401-492ChemistryQD1-999ENnpj 2D Materials and Applications, Vol 5, Iss 1, Pp 1-7 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	Materials of engineering and construction. Mechanics of materials TA401-492 Chemistry QD1-999
spellingShingle	Materials of engineering and construction. Mechanics of materials TA401-492 Chemistry QD1-999 Wei Cao Jae Hwan Chu Kamyar Parto Kaustav Banerjee A mode-balanced reconfigurable logic gate built in a van der Waals strata
description	Abstract Two-dimensional (2D) semiconducting materials, in particular transition-metal dichalcogenides, have emerged as the preferred channel materials for sub-5 nm field-effect transistors (FETs). However, the lack of practical doping techniques for these materials poses a significant challenge to designing complementary logic gates containing both n- and p-type FETs. Although electrical tuning of the polarity of 2D-FETs can potentially circumvent this problem, such devices suffer from the lack of balanced n- and p-mode transistor performance, forming one of the most enigmatic challenges of the reconfigurable 2D-FET technology. Here we provide a solution to this dilemma by judicious use of van der Waals (vdW) materials consisting of conductors, dielectrics and semiconductors forming a 50 nm thin quantum engineered strata that can guarantee a purely vdW-type interlayer interaction, which faithfully preserves the mid-gap contact design and thereby achieves an intrinsically mode-balanced and fully reconfigurable all-2D logic gate. The intrinsically mode-balanced gate eliminates the need for transistor sizing and allows post-fabrication reconfigurability to the transistor operation mode, simultaneously allowing an ultra-compact footprint and increased circuit functionality, which can be potentially exploited to build more area-efficient and low-cost integrated electronics for the internet of things (IoT) paradigm.
format	article
author	Wei Cao Jae Hwan Chu Kamyar Parto Kaustav Banerjee
author_facet	Wei Cao Jae Hwan Chu Kamyar Parto Kaustav Banerjee
author_sort	Wei Cao
title	A mode-balanced reconfigurable logic gate built in a van der Waals strata
title_short	A mode-balanced reconfigurable logic gate built in a van der Waals strata
title_full	A mode-balanced reconfigurable logic gate built in a van der Waals strata
title_fullStr	A mode-balanced reconfigurable logic gate built in a van der Waals strata
title_full_unstemmed	A mode-balanced reconfigurable logic gate built in a van der Waals strata
title_sort	mode-balanced reconfigurable logic gate built in a van der waals strata
publisher	Nature Portfolio
publishDate	2021
url	https://doaj.org/article/6ddcd6ece133465e948e2379bdff4e8c
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A mode-balanced reconfigurable logic gate built in a van der Waals strata

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