Image-Free Ultrasound Blood-Flow Monitoring Circuit System with Automatic Range-Gate Positioning Scheme: A Pilot Study
This work proposes a proof-of-concept ultrasound blood-flow-monitoring circuit system using a single-element transducer. The circuit system consists of a single-element ultrasonic transducer, an analog interface circuit, and a field-programmable gate array (FPGA). Since the system uses a single-elem...
Guardado en:
| Autores principales: | , |
|---|---|
| Formato: | article |
| Lenguaje: | EN |
| Publicado: |
MDPI AG
2021
|
| Materias: | |
| Acceso en línea: | https://doaj.org/article/80da08b7dde94b059f437697283724a4 |
| Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
| Sumario: | This work proposes a proof-of-concept ultrasound blood-flow-monitoring circuit system using a single-element transducer. The circuit system consists of a single-element ultrasonic transducer, an analog interface circuit, and a field-programmable gate array (FPGA). Since the system uses a single-element transducer, an ultrasound image cannot be reconstructed unless scanning with mechanical movement is used. An ultrasound blood-flow monitor basically needs to acquire a Doppler sample volume by positioning a range gate at a vessel region on a scanline. Most recent single-transducer-based ultrasound pulsed-wave Doppler devices rely on a manual adjustment of the range gate to acquire Doppler sample volumes. However, the manual adjustment of the range gate depends on the user’s experience, and it can be time consuming if a transducer is not properly positioned. Thus, automatic range-gate-positioning is more desirable for image-free pulsed-wave Doppler devices. This work proposes a circuit system which includes a new automatic range-gate-positioning scheme. It blindly tracks the position of a blood vessel on a scanline by using the accumulation of Doppler amplitude deviations and a hysteresis slicing function. The proposed range-gate-positioning scheme has been implemented in an FPGA for real-time operation and is based on addition-only computations, except for filter parts to reduce the complexity of computation in the hardware. The proposed blood-flow-monitoring circuit system has been implemented with discrete commercial chips for proof-of-concept purposes. It uses a center frequency of 2 MHz and a system-clock frequency of 20 MHz. The FPGA only utilizes 5.6% of slice look-up-tables (LUTs) for implementation of the range-gate-positioning scheme. For measurements, the circuit system was utilized to interrogate a customized flow phantom model, which included two vessel-mimicking channels. The circuit system successfully acquired Doppler sample volumes by positioning a range gate on a fluid channel. In addition, the estimated Doppler shift frequency shows a good agreement with the theoretical value. |
|---|