Design of 10T SRAM cell with improved read performance and expanded write margin
Abstract The need of genuine processors operation improvement cultivates the necessity for reliable, low power and fast memories. Several challenges follow this improvement at lower technology nodes. The impact of variability of process, temperature and voltage, on different performance parameters t...
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| Auteurs principaux: | , |
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| Format: | article |
| Langue: | EN |
| Publié: |
Wiley
2021
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| Accès en ligne: | https://doaj.org/article/89c3b594cf4c469d96fc8de6a893508d |
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