Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM)
Due to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated. Ternary logic circuit implementation with carbon nanotube field effect transistors (CNTFETs) and resistive random access memory (RRAM) integrat...
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MDPI AG
2021
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oai:doaj.org-article:8b21c734b4ac446c8dd9d97c8cfae1e82021-11-25T18:22:51ZTernary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM)10.3390/mi121112882072-666Xhttps://doaj.org/article/8b21c734b4ac446c8dd9d97c8cfae1e82021-10-01T00:00:00Zhttps://www.mdpi.com/2072-666X/12/11/1288https://doaj.org/toc/2072-666XDue to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated. Ternary logic circuit implementation with carbon nanotube field effect transistors (CNTFETs) and resistive random access memory (RRAM) integration is considered as a possible technology option. CNTFETs are currently being preferred for implementing ternary circuits due to their desirable multiple threshold voltage and geometry-dependent properties, whereas the RRAM is used due to its multilevel cell capability which enables storage of multiple resistance states within a single cell. This article presents the 2-trit arithmetic logic unit (ALU) design using CNTFETs and RRAM as the design elements. The proposed ALU incorporates a transmission gate block, a function select block, and various ternary function processing modules. The ALU design optimization is achieved by introducing a controlled ternary adder–subtractor module instead of separate adder and subtractor circuits. The simulations are analyzed and validated using Synopsis HSPICE simulation software with standard 32 nm CNTFET technology under different operating conditions (supply voltages) to test the robustness of the designs. The simulation results indicate that the proposed CNTFET-RRAM integration enables the compact circuit realization with good robustness. Moreover, due to the addition of RRAM as circuit element, the proposed ALU has the advantage of non-volatility.Furqan ZahoorFawnizu Azmadi HussinFarooq Ahmad KhandayMohamad Radzi AhmadIllani Mohd NawiMDPI AGarticlemultiple valued logic (MVL)resistive random access memory (RRAM)carbon nanotube field effect transistor (CNTFET)ternary logic systemsemerging technologiesinnovationMechanical engineering and machineryTJ1-1570ENMicromachines, Vol 12, Iss 1288, p 1288 (2021) |
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multiple valued logic (MVL) resistive random access memory (RRAM) carbon nanotube field effect transistor (CNTFET) ternary logic systems emerging technologies innovation Mechanical engineering and machinery TJ1-1570 |
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multiple valued logic (MVL) resistive random access memory (RRAM) carbon nanotube field effect transistor (CNTFET) ternary logic systems emerging technologies innovation Mechanical engineering and machinery TJ1-1570 Furqan Zahoor Fawnizu Azmadi Hussin Farooq Ahmad Khanday Mohamad Radzi Ahmad Illani Mohd Nawi Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
description |
Due to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated. Ternary logic circuit implementation with carbon nanotube field effect transistors (CNTFETs) and resistive random access memory (RRAM) integration is considered as a possible technology option. CNTFETs are currently being preferred for implementing ternary circuits due to their desirable multiple threshold voltage and geometry-dependent properties, whereas the RRAM is used due to its multilevel cell capability which enables storage of multiple resistance states within a single cell. This article presents the 2-trit arithmetic logic unit (ALU) design using CNTFETs and RRAM as the design elements. The proposed ALU incorporates a transmission gate block, a function select block, and various ternary function processing modules. The ALU design optimization is achieved by introducing a controlled ternary adder–subtractor module instead of separate adder and subtractor circuits. The simulations are analyzed and validated using Synopsis HSPICE simulation software with standard 32 nm CNTFET technology under different operating conditions (supply voltages) to test the robustness of the designs. The simulation results indicate that the proposed CNTFET-RRAM integration enables the compact circuit realization with good robustness. Moreover, due to the addition of RRAM as circuit element, the proposed ALU has the advantage of non-volatility. |
format |
article |
author |
Furqan Zahoor Fawnizu Azmadi Hussin Farooq Ahmad Khanday Mohamad Radzi Ahmad Illani Mohd Nawi |
author_facet |
Furqan Zahoor Fawnizu Azmadi Hussin Farooq Ahmad Khanday Mohamad Radzi Ahmad Illani Mohd Nawi |
author_sort |
Furqan Zahoor |
title |
Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
title_short |
Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
title_full |
Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
title_fullStr |
Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
title_full_unstemmed |
Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
title_sort |
ternary arithmetic logic unit design utilizing carbon nanotube field effect transistor (cntfet) and resistive random access memory (rram) |
publisher |
MDPI AG |
publishDate |
2021 |
url |
https://doaj.org/article/8b21c734b4ac446c8dd9d97c8cfae1e8 |
work_keys_str_mv |
AT furqanzahoor ternaryarithmeticlogicunitdesignutilizingcarbonnanotubefieldeffecttransistorcntfetandresistiverandomaccessmemoryrram AT fawnizuazmadihussin ternaryarithmeticlogicunitdesignutilizingcarbonnanotubefieldeffecttransistorcntfetandresistiverandomaccessmemoryrram AT farooqahmadkhanday ternaryarithmeticlogicunitdesignutilizingcarbonnanotubefieldeffecttransistorcntfetandresistiverandomaccessmemoryrram AT mohamadradziahmad ternaryarithmeticlogicunitdesignutilizingcarbonnanotubefieldeffecttransistorcntfetandresistiverandomaccessmemoryrram AT illanimohdnawi ternaryarithmeticlogicunitdesignutilizingcarbonnanotubefieldeffecttransistorcntfetandresistiverandomaccessmemoryrram |
_version_ |
1718411270135218176 |