FPGA Realization of Two-DimensionalWavelet and Wavelet Packet Transform
The Field Programmable Gate Array (FPGA) approach is the most recent category, which takes the place in the implementation of most of the Digital Signal Processing (DSP) applications. It had proved the capability to handle such problems and supports all the necessary needs like scalability, speed, s...
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| Autores principales: | , |
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| Formato: | article |
| Lenguaje: | EN |
| Publicado: |
Al-Khwarizmi College of Engineering – University of Baghdad
2005
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| Materias: | |
| Acceso en línea: | https://doaj.org/article/8f2f334ebd8e4e7698df5c801f66f0a6 |
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| Sumario: | The Field Programmable Gate Array (FPGA) approach is the most recent category, which takes the place in the implementation of most of the Digital Signal Processing (DSP) applications. It had proved the capability to handle such problems and supports all the necessary needs like scalability, speed, size, cost, and efficiency. <br />In this paper a new proposed circuit design is implemented for the evaluation of the coefficients of the two-dimensional Wavelet Transform (WT) and Wavelet Packet Transform (WPT) using FPGA is provided.<br />In this implementation the evaluations of the WT & WPT coefficients are depending upon filter tree decomposition using the 2-D discrete convolution algorithm. This implementation was achieved using an FPGA Kit after building the logical circuits on the specified kit that uses the Spartan-IIE electronic library type implemented using the Xilinx Foundation Series 2.1I software.<br /> |
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