Cita APA (7a ed.)

Cheng, W., Liu, X., Wu, H., Pai, H., & Chung, P. (2021). Reconfigurable Architecture and Dataflow for Memory Traffic Minimization of CNNs Computation. MDPI AG.

Cita Chicago Style (17a ed.)

Cheng, Wei-Kai, Xiang-Yi Liu, Hsin-Tzu Wu, Hsin-Yi Pai, y Po-Yao Chung. Reconfigurable Architecture and Dataflow for Memory Traffic Minimization of CNNs Computation. MDPI AG, 2021.

Cita MLA (8a ed.)

Cheng, Wei-Kai, et al. Reconfigurable Architecture and Dataflow for Memory Traffic Minimization of CNNs Computation. MDPI AG, 2021.