Assessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks

Embedding advanced cognitive capabilities in battery-constrained edge devices requires specialized hardware with new circuit architecture and—in the medium/long term—new device technology. We evaluate the potential of recently investigated devices based on 2-D materials for the...

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Autores principales:	Maksym Paliy, Sebastiano Strangio, Piero Ruiu, Giuseppe Iannaccone
Formato:	article
Lenguaje:	EN
Publicado:	IEEE 2021
Materias:	2-D materials analog neural networks floating-gate memories vector-matrix multipliers (VMMs) Computer engineering. Computer hardware TK7885-7895
Acceso en línea:	https://doaj.org/article/913fd2d8c30e4ac4b2a9d43aad822ebd
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spelling	oai:doaj.org-article:913fd2d8c30e4ac4b2a9d43aad822ebd2021-11-24T00:03:29ZAssessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks2329-923110.1109/JXCDC.2021.3121534https://doaj.org/article/913fd2d8c30e4ac4b2a9d43aad822ebd2021-01-01T00:00:00Zhttps://ieeexplore.ieee.org/document/9580839/https://doaj.org/toc/2329-9231Embedding advanced cognitive capabilities in battery-constrained edge devices requires specialized hardware with new circuit architecture and—in the medium/long term—new device technology. We evaluate the potential of recently investigated devices based on 2-D materials for the realization of analog deep neural networks (DNNs), by comparing the performance of neural networks based on the same circuit architecture using three different device technologies for transistors and analog memories. As a reference result, it is included in the comparison also an implementation on a standard 0.18 <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS technology. Our architecture of choice makes use of current-mode analog vector-matrix multipliers (VMMs) based on programmable current mirrors (CMs) consisting of transistors and floating-gate non-volatile memories. We consider experimentally demonstrated transistors and memories based on a monolayer molybdenum disulfide channel and ideal devices based on heterostructures of multilayer–monolayer PtSe<sub>2</sub>. Following a consistent methodology for device-circuit co-design and optimization, we estimate the layout area, energy efficiency, and throughput as a function of the equivalent number of bits (ENOB), which is strictly correlated with classification accuracy. System-level tradeoffs are apparent: for a small ENOB experimental MoS<sub>2</sub> floating-gate devices are already very promising; in our comparison, a larger ENOB (7 bits) is only achieved with CMOS, signaling the necessity to improve linearity and electrostatics of devices with 2-D materials.Maksym PaliySebastiano StrangioPiero RuiuGiuseppe IannacconeIEEEarticle2-D materialsanalog neural networksfloating-gate memoriesvector-matrix multipliers (VMMs)Computer engineering. Computer hardwareTK7885-7895ENIEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 7, Iss 2, Pp 141-149 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	2-D materials analog neural networks floating-gate memories vector-matrix multipliers (VMMs) Computer engineering. Computer hardware TK7885-7895
spellingShingle	2-D materials analog neural networks floating-gate memories vector-matrix multipliers (VMMs) Computer engineering. Computer hardware TK7885-7895 Maksym Paliy Sebastiano Strangio Piero Ruiu Giuseppe Iannaccone Assessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks
description	Embedding advanced cognitive capabilities in battery-constrained edge devices requires specialized hardware with new circuit architecture and—in the medium/long term—new device technology. We evaluate the potential of recently investigated devices based on 2-D materials for the realization of analog deep neural networks (DNNs), by comparing the performance of neural networks based on the same circuit architecture using three different device technologies for transistors and analog memories. As a reference result, it is included in the comparison also an implementation on a standard 0.18 <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS technology. Our architecture of choice makes use of current-mode analog vector-matrix multipliers (VMMs) based on programmable current mirrors (CMs) consisting of transistors and floating-gate non-volatile memories. We consider experimentally demonstrated transistors and memories based on a monolayer molybdenum disulfide channel and ideal devices based on heterostructures of multilayer–monolayer PtSe<sub>2</sub>. Following a consistent methodology for device-circuit co-design and optimization, we estimate the layout area, energy efficiency, and throughput as a function of the equivalent number of bits (ENOB), which is strictly correlated with classification accuracy. System-level tradeoffs are apparent: for a small ENOB experimental MoS<sub>2</sub> floating-gate devices are already very promising; in our comparison, a larger ENOB (7 bits) is only achieved with CMOS, signaling the necessity to improve linearity and electrostatics of devices with 2-D materials.
format	article
author	Maksym Paliy Sebastiano Strangio Piero Ruiu Giuseppe Iannaccone
author_facet	Maksym Paliy Sebastiano Strangio Piero Ruiu Giuseppe Iannaccone
author_sort	Maksym Paliy
title	Assessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks
title_short	Assessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks
title_full	Assessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks
title_fullStr	Assessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks
title_full_unstemmed	Assessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks
title_sort	assessment of two-dimensional materials-based technology for analog neural networks
publisher	IEEE
publishDate	2021
url	https://doaj.org/article/913fd2d8c30e4ac4b2a9d43aad822ebd
work_keys_str_mv	AT maksympaliy assessmentoftwodimensionalmaterialsbasedtechnologyforanalogneuralnetworks AT sebastianostrangio assessmentoftwodimensionalmaterialsbasedtechnologyforanalogneuralnetworks AT pieroruiu assessmentoftwodimensionalmaterialsbasedtechnologyforanalogneuralnetworks AT giuseppeiannaccone assessmentoftwodimensionalmaterialsbasedtechnologyforanalogneuralnetworks
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Assessment of Two-Dimensional Materials-Based Technology for Analog Neural Networks

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