Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition

Efficient data movement in multi-node systems is a crucial issue at the crossroads of scientific computing, big data, and high-performance computing, impacting demanding data acquisition applications from high-energy physics to astronomy, where dedicated accelerators such as FPGA devices play a key...

Descripción completa

Guardado en:

Detalles Bibliográficos
Autor principal:	Alessandro Cilardo
Formato:	article
Lenguaje:	EN
Publicado:	MDPI AG 2021
Materias:	HPC interconnects communication FPGA data acquisition Chemical technology TP1-1185
Acceso en línea:	https://doaj.org/article/93c466de70e34fc1ac61ad7962df2bd1
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

id	oai:doaj.org-article:93c466de70e34fc1ac61ad7962df2bd1
record_format	dspace
spelling	oai:doaj.org-article:93c466de70e34fc1ac61ad7962df2bd12021-11-25T18:59:04ZEvaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition10.3390/s212277591424-8220https://doaj.org/article/93c466de70e34fc1ac61ad7962df2bd12021-11-01T00:00:00Zhttps://www.mdpi.com/1424-8220/21/22/7759https://doaj.org/toc/1424-8220Efficient data movement in multi-node systems is a crucial issue at the crossroads of scientific computing, big data, and high-performance computing, impacting demanding data acquisition applications from high-energy physics to astronomy, where dedicated accelerators such as FPGA devices play a key role coupled with high-performance interconnect technologies. Building on the outcome of the RECIPE Horizon 2020 research project, this work evaluates the use of high-bandwidth interconnect standards, namely InfiniBand EDR and HDR, along with remote direct memory access functions for direct exposure of FPGA accelerator memory across a multi-node system. The prototype we present aims at avoiding dedicated network interfaces built in the FPGA accelerator itself, leaving most of the resources for user acceleration and supporting state-of-the-art interconnect technologies. We present the detail of the proposed system and a quantitative evaluation in terms of end-to-end bandwidth as concretely measured with a real-world FPGA-based multi-node HPC workload.Alessandro CilardoMDPI AGarticleHPCinterconnectscommunicationFPGAdata acquisitionChemical technologyTP1-1185ENSensors, Vol 21, Iss 7759, p 7759 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	HPC interconnects communication FPGA data acquisition Chemical technology TP1-1185
spellingShingle	HPC interconnects communication FPGA data acquisition Chemical technology TP1-1185 Alessandro Cilardo Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition
description	Efficient data movement in multi-node systems is a crucial issue at the crossroads of scientific computing, big data, and high-performance computing, impacting demanding data acquisition applications from high-energy physics to astronomy, where dedicated accelerators such as FPGA devices play a key role coupled with high-performance interconnect technologies. Building on the outcome of the RECIPE Horizon 2020 research project, this work evaluates the use of high-bandwidth interconnect standards, namely InfiniBand EDR and HDR, along with remote direct memory access functions for direct exposure of FPGA accelerator memory across a multi-node system. The prototype we present aims at avoiding dedicated network interfaces built in the FPGA accelerator itself, leaving most of the resources for user acceleration and supporting state-of-the-art interconnect technologies. We present the detail of the proposed system and a quantitative evaluation in terms of end-to-end bandwidth as concretely measured with a real-world FPGA-based multi-node HPC workload.
format	article
author	Alessandro Cilardo
author_facet	Alessandro Cilardo
author_sort	Alessandro Cilardo
title	Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition
title_short	Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition
title_full	Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition
title_fullStr	Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition
title_full_unstemmed	Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition
title_sort	evaluation of hpc acceleration and interconnect technologies for high-throughput data acquisition
publisher	MDPI AG
publishDate	2021
url	https://doaj.org/article/93c466de70e34fc1ac61ad7962df2bd1
work_keys_str_mv	AT alessandrocilardo evaluationofhpcaccelerationandinterconnecttechnologiesforhighthroughputdataacquisition
_version_	1718410476946194432

Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition

Ejemplares similares