A Highly Robust Binary Neural Network Inference Accelerator Based on Binary Memristors

Since memristor was found, it has shown great application potential in neuromorphic computing. Currently, most neural networks based on memristors deploy the special analog characteristics of memristor. However, owing to the limitation of manufacturing process, non-ideal characteristics such as non-...

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Autores principales: Yiyang Zhao, Yongjia Wang, Ruibo Wang, Yuan Rong, Xianyang Jiang
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Publicado: MDPI AG 2021
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spelling oai:doaj.org-article:950bc862b0af4d5fae37b64127904c442021-11-11T15:37:36ZA Highly Robust Binary Neural Network Inference Accelerator Based on Binary Memristors10.3390/electronics102126002079-9292https://doaj.org/article/950bc862b0af4d5fae37b64127904c442021-10-01T00:00:00Zhttps://www.mdpi.com/2079-9292/10/21/2600https://doaj.org/toc/2079-9292Since memristor was found, it has shown great application potential in neuromorphic computing. Currently, most neural networks based on memristors deploy the special analog characteristics of memristor. However, owing to the limitation of manufacturing process, non-ideal characteristics such as non-linearity, asymmetry, and inconsistent device periodicity appear frequently and definitely, therefore, it is a challenge to employ memristor in a massive way. On the contrary, a binary neural network (BNN) requires its weights to be either +1 or −1, which can be mapped by digital memristors with high technical maturity. Upon this, a highly robust BNN inference accelerator with binary sigmoid activation function is proposed. In the accelerator, the inputs of each network layer are either +1 or 0, which can facilitate feature encoding and reduce the peripheral circuit complexity of memristor hardware. The proposed two-column reference memristor structure together with current controlled voltage source (CCVS) circuit not only solves the problem of mapping positive and negative weights on memristor array, but also eliminates the sneak current effect under the minimum conductance status. Being compared to the traditional differential pair structure of BNN, the proposed two-column reference scheme can reduce both the number of memristors and the latency to refresh the memristor array by nearly 50%. The influence of non-ideal factors of memristor array such as memristor array yield, memristor conductance fluctuation, and reading noise on the accuracy of BNN is investigated in detail based on a newly memristor circuit model with non-ideal characteristics. The experimental results demonstrate that when the array yield <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>α</mi></semantics></math></inline-formula> ≥ 5%, or the reading noise <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>σ</mi></semantics></math></inline-formula> ≤ 0.25, a recognition accuracy greater than 97% on the MNIST data set is achieved.Yiyang ZhaoYongjia WangRuibo WangYuan RongXianyang JiangMDPI AGarticlememristorbinary neural network (BNN)non-ideal factorsVerilog-AMSElectronicsTK7800-8360ENElectronics, Vol 10, Iss 2600, p 2600 (2021)
institution DOAJ
collection DOAJ
language EN
topic memristor
binary neural network (BNN)
non-ideal factors
Verilog-AMS
Electronics
TK7800-8360
spellingShingle memristor
binary neural network (BNN)
non-ideal factors
Verilog-AMS
Electronics
TK7800-8360
Yiyang Zhao
Yongjia Wang
Ruibo Wang
Yuan Rong
Xianyang Jiang
A Highly Robust Binary Neural Network Inference Accelerator Based on Binary Memristors
description Since memristor was found, it has shown great application potential in neuromorphic computing. Currently, most neural networks based on memristors deploy the special analog characteristics of memristor. However, owing to the limitation of manufacturing process, non-ideal characteristics such as non-linearity, asymmetry, and inconsistent device periodicity appear frequently and definitely, therefore, it is a challenge to employ memristor in a massive way. On the contrary, a binary neural network (BNN) requires its weights to be either +1 or −1, which can be mapped by digital memristors with high technical maturity. Upon this, a highly robust BNN inference accelerator with binary sigmoid activation function is proposed. In the accelerator, the inputs of each network layer are either +1 or 0, which can facilitate feature encoding and reduce the peripheral circuit complexity of memristor hardware. The proposed two-column reference memristor structure together with current controlled voltage source (CCVS) circuit not only solves the problem of mapping positive and negative weights on memristor array, but also eliminates the sneak current effect under the minimum conductance status. Being compared to the traditional differential pair structure of BNN, the proposed two-column reference scheme can reduce both the number of memristors and the latency to refresh the memristor array by nearly 50%. The influence of non-ideal factors of memristor array such as memristor array yield, memristor conductance fluctuation, and reading noise on the accuracy of BNN is investigated in detail based on a newly memristor circuit model with non-ideal characteristics. The experimental results demonstrate that when the array yield <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>α</mi></semantics></math></inline-formula> ≥ 5%, or the reading noise <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi>σ</mi></semantics></math></inline-formula> ≤ 0.25, a recognition accuracy greater than 97% on the MNIST data set is achieved.
format article
author Yiyang Zhao
Yongjia Wang
Ruibo Wang
Yuan Rong
Xianyang Jiang
author_facet Yiyang Zhao
Yongjia Wang
Ruibo Wang
Yuan Rong
Xianyang Jiang
author_sort Yiyang Zhao
title A Highly Robust Binary Neural Network Inference Accelerator Based on Binary Memristors
title_short A Highly Robust Binary Neural Network Inference Accelerator Based on Binary Memristors
title_full A Highly Robust Binary Neural Network Inference Accelerator Based on Binary Memristors
title_fullStr A Highly Robust Binary Neural Network Inference Accelerator Based on Binary Memristors
title_full_unstemmed A Highly Robust Binary Neural Network Inference Accelerator Based on Binary Memristors
title_sort highly robust binary neural network inference accelerator based on binary memristors
publisher MDPI AG
publishDate 2021
url https://doaj.org/article/950bc862b0af4d5fae37b64127904c44
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