An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations

In standard computing architectures, memory and logic circuits are separated, a feature that slows matrix operations vital to deep learning algorithms. Here, the authors present an alternate in-memory architecture and demonstrate a feasible approach for analog matrix multiplication.

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Autores principales:	Yin Wang, Hongwei Tang, Yufeng Xie, Xinyu Chen, Shunli Ma, Zhengzong Sun, Qingqing Sun, Lin Chen, Hao Zhu, Jing Wan, Zihan Xu, David Wei Zhang, Peng Zhou, Wenzhong Bao
Formato:	article
Lenguaje:	EN
Publicado:	Nature Portfolio 2021
Materias:	Science Q
Acceso en línea:	https://doaj.org/article/95c950a5eea5402c9ba88b7eef5a5b8c
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spelling	oai:doaj.org-article:95c950a5eea5402c9ba88b7eef5a5b8c2021-12-02T17:52:38ZAn in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations10.1038/s41467-021-23719-32041-1723https://doaj.org/article/95c950a5eea5402c9ba88b7eef5a5b8c2021-06-01T00:00:00Zhttps://doi.org/10.1038/s41467-021-23719-3https://doaj.org/toc/2041-1723In standard computing architectures, memory and logic circuits are separated, a feature that slows matrix operations vital to deep learning algorithms. Here, the authors present an alternate in-memory architecture and demonstrate a feasible approach for analog matrix multiplication.Yin WangHongwei TangYufeng XieXinyu ChenShunli MaZhengzong SunQingqing SunLin ChenHao ZhuJing WanZihan XuDavid Wei ZhangPeng ZhouWenzhong BaoNature PortfolioarticleScienceQENNature Communications, Vol 12, Iss 1, Pp 1-8 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	Science Q
spellingShingle	Science Q Yin Wang Hongwei Tang Yufeng Xie Xinyu Chen Shunli Ma Zhengzong Sun Qingqing Sun Lin Chen Hao Zhu Jing Wan Zihan Xu David Wei Zhang Peng Zhou Wenzhong Bao An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations
description	In standard computing architectures, memory and logic circuits are separated, a feature that slows matrix operations vital to deep learning algorithms. Here, the authors present an alternate in-memory architecture and demonstrate a feasible approach for analog matrix multiplication.
format	article
author	Yin Wang Hongwei Tang Yufeng Xie Xinyu Chen Shunli Ma Zhengzong Sun Qingqing Sun Lin Chen Hao Zhu Jing Wan Zihan Xu David Wei Zhang Peng Zhou Wenzhong Bao
author_facet	Yin Wang Hongwei Tang Yufeng Xie Xinyu Chen Shunli Ma Zhengzong Sun Qingqing Sun Lin Chen Hao Zhu Jing Wan Zihan Xu David Wei Zhang Peng Zhou Wenzhong Bao
author_sort	Yin Wang
title	An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations
title_short	An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations
title_full	An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations
title_fullStr	An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations
title_full_unstemmed	An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations
title_sort	in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations
publisher	Nature Portfolio
publishDate	2021
url	https://doaj.org/article/95c950a5eea5402c9ba88b7eef5a5b8c
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An in-memory computing architecture based on two-dimensional semiconductors for multiply-accumulate operations

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