Analog CMOS Readout Channel for Time and Amplitude Measurements With Radiation Sensitivity Analysis for Gain-Boosting Amplifiers
The front-end readout channel consists of a charge sensitive amplifier (CSA) and two different unipolar-shaping circuits to generate pulses suitable for time and energy measurement. The signal processing chain of the single channel is built of two different parallel processing paths: a fast path wit...
Guardado en:
Autores principales: | , , , , , |
---|---|
Formato: | article |
Lenguaje: | EN |
Publicado: |
IEEE
2021
|
Materias: | |
Acceso en línea: | https://doaj.org/article/95f586865ce140fe8e40408535617286 |
Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
Sumario: | The front-end readout channel consists of a charge sensitive amplifier (CSA) and two different unipolar-shaping circuits to generate pulses suitable for time and energy measurement. The signal processing chain of the single channel is built of two different parallel processing paths: a fast path with a peaking time of 30 ns to obtain the time of arrival for each particle impinging the detector; and a slow path with a peaking time of 400 ns dedicated for low noise amplitude measurements, which is formed by a pole-zero cancellation circuit and a 4th order complex shaper based on a bridged-T architecture. The tunability of the system is accomplished by the discharge time constant of the CSA in order to accommodate various event rates. The readout system has been implemented in a 180 nm CMOS technology with the size of 525 <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> x <inline-formula> <tex-math notation="LaTeX">$290~\mu \text{m}$ </tex-math></inline-formula>. The building blocks use compact gain-boosting techniques based on quasi-floating gate (QFG) transistors achieving accurate energy measurement with good resolution. The high impedance nodes of QFG transistors require a detailed study of sensitivity to single-effect transients (SET). After carrying out this study, this paper proposes a method to select the value of the QFG capacitors, minimizing the area occupancy while maintaining robustness to radiation. The nonlinearity of the CSA-slow-shaper has been found to be less than 1% over a 10–70 fC input charge. The power dissipation of the readout channel is 4.1 mW with a supply voltage of 1.8 V. |
---|