Inverter current control for reactive power compensation in solar grid system using Self-Tuned Fuzzy Logic Controller
The solar photovoltaic (PV) systems have gained more attention in renewable energy production due to their cost efficiency and reliability. Typically, reactive power compensation and harmonics elimination are challenging and demanding tasks for improving the efficacy of grid-connected solar PV syste...
Enregistré dans:
| Auteurs principaux: | , |
|---|---|
| Format: | article |
| Langue: | EN |
| Publié: |
Taylor & Francis Group
2022
|
| Sujets: | |
| Accès en ligne: | https://doaj.org/article/ab5c3ee1f8a64d638a36f7a0ebc02948 |
| Tags: |
Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!
|
| Résumé: | The solar photovoltaic (PV) systems have gained more attention in renewable energy production due to their cost efficiency and reliability. Typically, reactive power compensation and harmonics elimination are challenging and demanding tasks for improving the efficacy of grid-connected solar PV systems. For this purpose, many research works developed different converter and controller topologies for solving the power quality issues in grid-PV systems. But, it limits the problems of increased harmonics, computation complexity, inefficiency and reduced performance outcomes. Thus, this research aims to develop an integrated hysteresis current controller and Self-Tuned Fuzzy Logic (SFLC) based MPPT controllers for eliminating the harmonics and unbalanced current in single-phase grid systems. Also, it helps to extract the maximum amount of power from the solar PV array. The LUO converter is deployed to reduce ripple contents. The Phased Locked Loop (PLL) based synchronization is performed to maintain the phase angle, frequency and magnitude levels of source power. Moreover, the hysteresis current controller for the inverter has been specifically designed to reduce the THD of the system under IEEE519_1992 regulations. During experiments, both the simulation and hardware results have been evaluated for validating the performance of the proposed controller design. |
|---|