Large memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel
Abstract A charge‐trapping memory (CTM) field effect transistor (FET) featured with an Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel are fabricated. Benefit from high defect densities of the Hf1.5Gd2O6 film, large memory windows are achieved under low operating voltages (2.3 V@4 V, 3.1 V@5...
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| Main Authors: | , , , , , , , |
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| Format: | article |
| Language: | EN |
| Published: |
Wiley
2021
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| Subjects: | |
| Online Access: | https://doaj.org/article/abf56457fc5a45ff9a73d57d23e092b5 |
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| Summary: | Abstract A charge‐trapping memory (CTM) field effect transistor (FET) featured with an Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel are fabricated. Benefit from high defect densities of the Hf1.5Gd2O6 film, large memory windows are achieved under low operating voltages (2.3 V@4 V, 3.1 V@5 V and 3.6 V@6 V), which distinctly outperform previously reported CTMs. In addition, high programming/erase (P/E) speeds, good data retention and endurance characteristics are experimentally demonstrated. The results demonstrate a feasibility of CTM FET with an HfGdO charge trapping layer and thin MoS2 channel for ultra‐low power memory devices application. |
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