Large memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel

Abstract A charge‐trapping memory (CTM) field effect transistor (FET) featured with an Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel are fabricated. Benefit from high defect densities of the Hf1.5Gd2O6 film, large memory windows are achieved under low operating voltages (2.3 V@4 V, 3.1 V@5...

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Autores principales: Zhaohao Zhang, Yaoguang Liu, Qianhui Wei, Qingzhu Zhang, Junjie Li, Feng Wei, Zhenhua Wu, Huaxiang Yin
Formato: article
Lenguaje:EN
Publicado: Wiley 2021
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Acceso en línea:https://doaj.org/article/abf56457fc5a45ff9a73d57d23e092b5
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spelling oai:doaj.org-article:abf56457fc5a45ff9a73d57d23e092b52021-12-03T08:34:31ZLarge memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel1350-911X0013-519410.1049/ell2.12333https://doaj.org/article/abf56457fc5a45ff9a73d57d23e092b52021-12-01T00:00:00Zhttps://doi.org/10.1049/ell2.12333https://doaj.org/toc/0013-5194https://doaj.org/toc/1350-911XAbstract A charge‐trapping memory (CTM) field effect transistor (FET) featured with an Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel are fabricated. Benefit from high defect densities of the Hf1.5Gd2O6 film, large memory windows are achieved under low operating voltages (2.3 V@4 V, 3.1 V@5 V and 3.6 V@6 V), which distinctly outperform previously reported CTMs. In addition, high programming/erase (P/E) speeds, good data retention and endurance characteristics are experimentally demonstrated. The results demonstrate a feasibility of CTM FET with an HfGdO charge trapping layer and thin MoS2 channel for ultra‐low power memory devices application.Zhaohao ZhangYaoguang LiuQianhui WeiQingzhu ZhangJunjie LiFeng WeiZhenhua WuHuaxiang YinWileyarticleElectrical engineering. Electronics. Nuclear engineeringTK1-9971ENElectronics Letters, Vol 57, Iss 25, Pp 992-994 (2021)
institution DOAJ
collection DOAJ
language EN
topic Electrical engineering. Electronics. Nuclear engineering
TK1-9971
spellingShingle Electrical engineering. Electronics. Nuclear engineering
TK1-9971
Zhaohao Zhang
Yaoguang Liu
Qianhui Wei
Qingzhu Zhang
Junjie Li
Feng Wei
Zhenhua Wu
Huaxiang Yin
Large memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel
description Abstract A charge‐trapping memory (CTM) field effect transistor (FET) featured with an Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel are fabricated. Benefit from high defect densities of the Hf1.5Gd2O6 film, large memory windows are achieved under low operating voltages (2.3 V@4 V, 3.1 V@5 V and 3.6 V@6 V), which distinctly outperform previously reported CTMs. In addition, high programming/erase (P/E) speeds, good data retention and endurance characteristics are experimentally demonstrated. The results demonstrate a feasibility of CTM FET with an HfGdO charge trapping layer and thin MoS2 channel for ultra‐low power memory devices application.
format article
author Zhaohao Zhang
Yaoguang Liu
Qianhui Wei
Qingzhu Zhang
Junjie Li
Feng Wei
Zhenhua Wu
Huaxiang Yin
author_facet Zhaohao Zhang
Yaoguang Liu
Qianhui Wei
Qingzhu Zhang
Junjie Li
Feng Wei
Zhenhua Wu
Huaxiang Yin
author_sort Zhaohao Zhang
title Large memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel
title_short Large memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel
title_full Large memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel
title_fullStr Large memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel
title_full_unstemmed Large memory window with low operating voltages using Hf1.5Gd2O6 charge trapping layer and thin MoS2 channel
title_sort large memory window with low operating voltages using hf1.5gd2o6 charge trapping layer and thin mos2 channel
publisher Wiley
publishDate 2021
url https://doaj.org/article/abf56457fc5a45ff9a73d57d23e092b5
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