Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving Power
In this paper, a FPGA model of intelligent traffic light system with power saving was built. The intelligent traffic light system consists of sensors placed on the side's ends of the intersection to sense the presence or absence of vehicles. This system reduces the waiting time when the traffi...
Enregistré dans:
| Auteur principal: | |
|---|---|
| Format: | article |
| Langue: | EN |
| Publié: |
Al-Khwarizmi College of Engineering – University of Baghdad
2012
|
| Sujets: | |
| Accès en ligne: | https://doaj.org/article/b463afb3d2634bf58b75452427e9a00c |
| Tags: |
Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!
|
| Résumé: | In this paper, a FPGA model of intelligent traffic light system with power saving was built. The intelligent traffic light system consists of sensors placed on the side's ends of the intersection to sense the presence or absence of vehicles. This system reduces the waiting time when the traffic light is red, through the transition from traffic light state to the other state, when the first state spends a lot of time, because there are no more vehicles. The proposed system is built using VHDL, simulated using Xilinx ISE 9.2i package, and implemented using Spartan-3A XC3S700A FPGA kit. Implementation and Simulation behavioral model results show that the proposed intelligent traffic light system model satisfies the specified operational requirements.
|
|---|