Hardware Architecture of Stochastic Computing Neural Network

Stochastic computing is a kind of logic calculation that converts binary into probabilistic coded digital pulse stream. At the cost of computing power and time delay, it has the computing advantages of low power consumption and high energy efficiency. In this paper, the basic concept of stochastic c...

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Autor principal:	CHEN Yuhao, SONG Yinjie, ZHU Yanan, GAO Yunfei, LI Hongge+
Formato:	article
Lenguaje:	ZH
Publicado:	Journal of Computer Engineering and Applications Beijing Co., Ltd., Science Press 2021
Materias:	stochastic computing spiking neural network low power consumption brain like chip Electronic computers. Computer science QA75.5-76.95
Acceso en línea:	https://doaj.org/article/be40b509a8c54c89a5e57ed77ec65635
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spelling	oai:doaj.org-article:be40b509a8c54c89a5e57ed77ec656352021-11-10T08:09:09ZHardware Architecture of Stochastic Computing Neural Network10.3778/j.issn.1673-9418.21050501673-9418https://doaj.org/article/be40b509a8c54c89a5e57ed77ec656352021-11-01T00:00:00Zhttp://fcst.ceaj.org/CN/abstract/abstract2950.shtmlhttps://doaj.org/toc/1673-9418Stochastic computing is a kind of logic calculation that converts binary into probabilistic coded digital pulse stream. At the cost of computing power and time delay, it has the computing advantages of low power consumption and high energy efficiency. In this paper, the basic concept of stochastic computing is explained, and a stochastic computing circuit with single-channel or multi-channel is designed to improve the speed and accuracy. Based on the stochastic computing circuit, the stochastic pulse neuron is designed, and the reconfigurable computing architecture of neural network, BUAA-ChouSuan, is realized. The design is implemented with KINTEX-7 (FPGA), the logic resource (lookup table, LUT) of stochastic MAC (multiply accumulate) is 80% lower than that of traditional MAC. In SCNN (stochastic convolutional neural network) experiment, LeNet and AlexNet are tested. Under the condition of 350 MHz clock frequency, the average energy efficiency can reach 0.536 TSOPS/W, and the utilization rate of processing unit (PE) can reach more than 90%.CHEN Yuhao, SONG Yinjie, ZHU Yanan, GAO Yunfei, LI Hongge+Journal of Computer Engineering and Applications Beijing Co., Ltd., Science Pressarticlestochastic computingspiking neural networklow power consumptionbrain like chipElectronic computers. Computer scienceQA75.5-76.95ZHJisuanji kexue yu tansuo, Vol 15, Iss 11, Pp 2105-2115 (2021)
institution	DOAJ
collection	DOAJ
language	ZH
topic	stochastic computing spiking neural network low power consumption brain like chip Electronic computers. Computer science QA75.5-76.95
spellingShingle	stochastic computing spiking neural network low power consumption brain like chip Electronic computers. Computer science QA75.5-76.95 CHEN Yuhao, SONG Yinjie, ZHU Yanan, GAO Yunfei, LI Hongge+ Hardware Architecture of Stochastic Computing Neural Network
description	Stochastic computing is a kind of logic calculation that converts binary into probabilistic coded digital pulse stream. At the cost of computing power and time delay, it has the computing advantages of low power consumption and high energy efficiency. In this paper, the basic concept of stochastic computing is explained, and a stochastic computing circuit with single-channel or multi-channel is designed to improve the speed and accuracy. Based on the stochastic computing circuit, the stochastic pulse neuron is designed, and the reconfigurable computing architecture of neural network, BUAA-ChouSuan, is realized. The design is implemented with KINTEX-7 (FPGA), the logic resource (lookup table, LUT) of stochastic MAC (multiply accumulate) is 80% lower than that of traditional MAC. In SCNN (stochastic convolutional neural network) experiment, LeNet and AlexNet are tested. Under the condition of 350 MHz clock frequency, the average energy efficiency can reach 0.536 TSOPS/W, and the utilization rate of processing unit (PE) can reach more than 90%.
format	article
author	CHEN Yuhao, SONG Yinjie, ZHU Yanan, GAO Yunfei, LI Hongge+
author_facet	CHEN Yuhao, SONG Yinjie, ZHU Yanan, GAO Yunfei, LI Hongge+
author_sort	CHEN Yuhao, SONG Yinjie, ZHU Yanan, GAO Yunfei, LI Hongge+
title	Hardware Architecture of Stochastic Computing Neural Network
title_short	Hardware Architecture of Stochastic Computing Neural Network
title_full	Hardware Architecture of Stochastic Computing Neural Network
title_fullStr	Hardware Architecture of Stochastic Computing Neural Network
title_full_unstemmed	Hardware Architecture of Stochastic Computing Neural Network
title_sort	hardware architecture of stochastic computing neural network
publisher	Journal of Computer Engineering and Applications Beijing Co., Ltd., Science Press
publishDate	2021
url	https://doaj.org/article/be40b509a8c54c89a5e57ed77ec65635
work_keys_str_mv	AT chenyuhaosongyinjiezhuyanangaoyunfeilihongge hardwarearchitectureofstochasticcomputingneuralnetwork
_version_	1718440414064672768

Hardware Architecture of Stochastic Computing Neural Network

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