Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs

Abstract A ternary logic decoder (TLD) is demonstrated with independently controlled double-gate (ICDG) silicon-nanowire (Si-NW) MOSFETs to confirm a feasibility of mixed radix system (MRS). The TLD is essential component for realization of the MRS. The ICDG Si-NW MOSFET resolves the limitations of...

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Autores principales: Seong-Joo Han, Joon-kyu Han, Myung-Su Kim, Gyeong-Jun Yun, Ji-Man Yu, Il-Woong Tcho, Myungsoo Seo, Geon-Beom Lee, Yang-Kyu Choi
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Publicado: Nature Portfolio 2021
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Acceso en línea:https://doaj.org/article/c21f1688580f413898e210f3e8a1f845
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spelling oai:doaj.org-article:c21f1688580f413898e210f3e8a1f8452021-12-02T16:06:08ZTernary logic decoder using independently controlled double-gate Si-NW MOSFETs10.1038/s41598-021-92378-72045-2322https://doaj.org/article/c21f1688580f413898e210f3e8a1f8452021-06-01T00:00:00Zhttps://doi.org/10.1038/s41598-021-92378-7https://doaj.org/toc/2045-2322Abstract A ternary logic decoder (TLD) is demonstrated with independently controlled double-gate (ICDG) silicon-nanowire (Si-NW) MOSFETs to confirm a feasibility of mixed radix system (MRS). The TLD is essential component for realization of the MRS. The ICDG Si-NW MOSFET resolves the limitations of the conventional multi-threshold voltage (multi-V th) schemes required for the TLD. The ICDG Si-NW MOSFETs were fabricated and characterized. Afterwards, their electrical characteristics were modeled and fitted semi-empirically with the aid of SILVACO ATLAS TCAD simulator. The circuit performance and power consumption of the TLD were analyzed using ATLAS mixed-mode TCAD simulations. The TLD showed a power-delay product of 35 aJ for a gate length (L G) of 500 nm and that of 0.16 aJ for L G of 14 nm. Thanks to its inherent CMOS-compatibility and scalability, the TLD based on the ICDG Si-NW MOSFETs would be a promising candidate for a MRS using ternary and binary logic.Seong-Joo HanJoon-kyu HanMyung-Su KimGyeong-Jun YunJi-Man YuIl-Woong TchoMyungsoo SeoGeon-Beom LeeYang-Kyu ChoiNature PortfolioarticleMedicineRScienceQENScientific Reports, Vol 11, Iss 1, Pp 1-10 (2021)
institution DOAJ
collection DOAJ
language EN
topic Medicine
R
Science
Q
spellingShingle Medicine
R
Science
Q
Seong-Joo Han
Joon-kyu Han
Myung-Su Kim
Gyeong-Jun Yun
Ji-Man Yu
Il-Woong Tcho
Myungsoo Seo
Geon-Beom Lee
Yang-Kyu Choi
Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
description Abstract A ternary logic decoder (TLD) is demonstrated with independently controlled double-gate (ICDG) silicon-nanowire (Si-NW) MOSFETs to confirm a feasibility of mixed radix system (MRS). The TLD is essential component for realization of the MRS. The ICDG Si-NW MOSFET resolves the limitations of the conventional multi-threshold voltage (multi-V th) schemes required for the TLD. The ICDG Si-NW MOSFETs were fabricated and characterized. Afterwards, their electrical characteristics were modeled and fitted semi-empirically with the aid of SILVACO ATLAS TCAD simulator. The circuit performance and power consumption of the TLD were analyzed using ATLAS mixed-mode TCAD simulations. The TLD showed a power-delay product of 35 aJ for a gate length (L G) of 500 nm and that of 0.16 aJ for L G of 14 nm. Thanks to its inherent CMOS-compatibility and scalability, the TLD based on the ICDG Si-NW MOSFETs would be a promising candidate for a MRS using ternary and binary logic.
format article
author Seong-Joo Han
Joon-kyu Han
Myung-Su Kim
Gyeong-Jun Yun
Ji-Man Yu
Il-Woong Tcho
Myungsoo Seo
Geon-Beom Lee
Yang-Kyu Choi
author_facet Seong-Joo Han
Joon-kyu Han
Myung-Su Kim
Gyeong-Jun Yun
Ji-Man Yu
Il-Woong Tcho
Myungsoo Seo
Geon-Beom Lee
Yang-Kyu Choi
author_sort Seong-Joo Han
title Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
title_short Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
title_full Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
title_fullStr Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
title_full_unstemmed Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
title_sort ternary logic decoder using independently controlled double-gate si-nw mosfets
publisher Nature Portfolio
publishDate 2021
url https://doaj.org/article/c21f1688580f413898e210f3e8a1f845
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