A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium
The lattice-based CRYSTALS-Dilithium scheme is one of the three thirdround digital signature finalists in the National Institute of Standards and Technology Post-Quantum Cryptography Standardization Process. Due to the complex calculations and highly individualized functions in Dilithium, its hardw...
Guardado en:
| Autores principales: | , , , , , , , , , |
|---|---|
| Formato: | article |
| Lenguaje: | EN |
| Publicado: |
Ruhr-Universität Bochum
2021
|
| Materias: | |
| Acceso en línea: | https://doaj.org/article/ce388e2a16a9481d8bc3792f6ac31e46 |
| Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
| id |
oai:doaj.org-article:ce388e2a16a9481d8bc3792f6ac31e46 |
|---|---|
| record_format |
dspace |
| spelling |
oai:doaj.org-article:ce388e2a16a9481d8bc3792f6ac31e462021-11-19T14:36:11ZA Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium10.46586/tches.v2022.i1.270-2952569-2925https://doaj.org/article/ce388e2a16a9481d8bc3792f6ac31e462021-11-01T00:00:00Zhttps://tches.iacr.org/index.php/TCHES/article/view/9297https://doaj.org/toc/2569-2925 The lattice-based CRYSTALS-Dilithium scheme is one of the three thirdround digital signature finalists in the National Institute of Standards and Technology Post-Quantum Cryptography Standardization Process. Due to the complex calculations and highly individualized functions in Dilithium, its hardware implementations face the problems of large area requirements and low efficiency. This paper proposes several optimization methods to achieve a compact and high-performance hardware architecture for round 3 Dilithium. Specifically, a segmented pipelined processing method is proposed to reduce both the storage requirements and the processing time. Moreover, several optimized modules are designed to improve the efficiency of the proposed architecture, including a pipelined number theoretic transform module, a SampleInBall module, a Decompose module, and three modular reduction modules. Compared with state-of-the-art designs for Dilithium on similar platforms, our implementation requires 1.4×/1.4×/3.0×/4.5× fewer LUTs/FFs/BRAMs/DSPs, respectively, and 4.4×/1.7×/1.4× less time for key generation, signature generation, and signature verification, respectively, for NIST security level 5. Cankun ZhaoNeng ZhangHanning WangBohan YangWenping ZhuZhengdong LiMin ZhuShouyi YinShaojun WeiLeibo LiuRuhr-Universität BochumarticleCRYSTALS-DilithiumFPGApost-quantum cryptographydigital signaturemodule learning with errorsComputer engineering. Computer hardwareTK7885-7895Information technologyT58.5-58.64ENTransactions on Cryptographic Hardware and Embedded Systems, Vol 2022, Iss 1 (2021) |
| institution |
DOAJ |
| collection |
DOAJ |
| language |
EN |
| topic |
CRYSTALS-Dilithium FPGA post-quantum cryptography digital signature module learning with errors Computer engineering. Computer hardware TK7885-7895 Information technology T58.5-58.64 |
| spellingShingle |
CRYSTALS-Dilithium FPGA post-quantum cryptography digital signature module learning with errors Computer engineering. Computer hardware TK7885-7895 Information technology T58.5-58.64 Cankun Zhao Neng Zhang Hanning Wang Bohan Yang Wenping Zhu Zhengdong Li Min Zhu Shouyi Yin Shaojun Wei Leibo Liu A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium |
| description |
The lattice-based CRYSTALS-Dilithium scheme is one of the three thirdround digital signature finalists in the National Institute of Standards and Technology Post-Quantum Cryptography Standardization Process. Due to the complex calculations and highly individualized functions in Dilithium, its hardware implementations face the problems of large area requirements and low efficiency. This paper proposes several optimization methods to achieve a compact and high-performance hardware architecture for round 3 Dilithium. Specifically, a segmented pipelined processing method is proposed to reduce both the storage requirements and the processing time. Moreover, several optimized modules are designed to improve the efficiency of the proposed architecture, including a pipelined number theoretic transform module, a SampleInBall module, a Decompose module, and three modular reduction modules. Compared with state-of-the-art designs for Dilithium on similar platforms, our implementation requires 1.4×/1.4×/3.0×/4.5× fewer LUTs/FFs/BRAMs/DSPs, respectively, and 4.4×/1.7×/1.4× less time for key generation, signature generation, and signature verification, respectively, for NIST security level 5.
|
| format |
article |
| author |
Cankun Zhao Neng Zhang Hanning Wang Bohan Yang Wenping Zhu Zhengdong Li Min Zhu Shouyi Yin Shaojun Wei Leibo Liu |
| author_facet |
Cankun Zhao Neng Zhang Hanning Wang Bohan Yang Wenping Zhu Zhengdong Li Min Zhu Shouyi Yin Shaojun Wei Leibo Liu |
| author_sort |
Cankun Zhao |
| title |
A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium |
| title_short |
A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium |
| title_full |
A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium |
| title_fullStr |
A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium |
| title_full_unstemmed |
A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium |
| title_sort |
compact and high-performance hardware architecture for crystals-dilithium |
| publisher |
Ruhr-Universität Bochum |
| publishDate |
2021 |
| url |
https://doaj.org/article/ce388e2a16a9481d8bc3792f6ac31e46 |
| work_keys_str_mv |
AT cankunzhao acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT nengzhang acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT hanningwang acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT bohanyang acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT wenpingzhu acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT zhengdongli acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT minzhu acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT shouyiyin acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT shaojunwei acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT leiboliu acompactandhighperformancehardwarearchitectureforcrystalsdilithium AT cankunzhao compactandhighperformancehardwarearchitectureforcrystalsdilithium AT nengzhang compactandhighperformancehardwarearchitectureforcrystalsdilithium AT hanningwang compactandhighperformancehardwarearchitectureforcrystalsdilithium AT bohanyang compactandhighperformancehardwarearchitectureforcrystalsdilithium AT wenpingzhu compactandhighperformancehardwarearchitectureforcrystalsdilithium AT zhengdongli compactandhighperformancehardwarearchitectureforcrystalsdilithium AT minzhu compactandhighperformancehardwarearchitectureforcrystalsdilithium AT shouyiyin compactandhighperformancehardwarearchitectureforcrystalsdilithium AT shaojunwei compactandhighperformancehardwarearchitectureforcrystalsdilithium AT leiboliu compactandhighperformancehardwarearchitectureforcrystalsdilithium |
| _version_ |
1718420097093074944 |