Design and Analysis of Asynchronous Sampling Duty Cycle Corrector
This paper presents a duty cycle correction scheme based on asynchronous sampling and associated settling analysis. The proposed duty cycle corrector circuit consumes less power and area compared to other corrector circuits due to the low-frequency operation of asynchronous sampling. However, the se...
Saved in:
Main Authors: | Gijin Park, Jaeduk Han, Woorham Bae |
---|---|
Format: | article |
Language: | EN |
Published: |
MDPI AG
2021
|
Subjects: | |
Online Access: | https://doaj.org/article/00fc41f141dc4412a5e4a2a3aa82276b |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
A 6.89-MHz 143-nW MEMS Oscillator Based on a 118-dBΩ Tunable Gain and Duty-Cycle CMOS TIA
by: Ahmed Kira, et al.
Published: (2021) -
Distributed Secondary Voltage Control for DC Microgrids with Consideration of Asynchronous Sampling
by: Guannan Lou, et al.
Published: (2021) -
THE PERCEPTION OF TEACHERS ABAUT ON DUTY
by: Şehmus ORAL, et al.
Published: (2019) -
Disclosure duties in insurance contract
by: Ivančević Katarina B.
Published: (2021) -
A Regulated Pulse Current Driver with Spread Spectrum Clock Generator
by: Ming-Shian Lin
Published: (2021)