Design and Analysis of Asynchronous Sampling Duty Cycle Corrector
This paper presents a duty cycle correction scheme based on asynchronous sampling and associated settling analysis. The proposed duty cycle corrector circuit consumes less power and area compared to other corrector circuits due to the low-frequency operation of asynchronous sampling. However, the se...
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| Auteurs principaux: | , , |
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| Format: | article |
| Langue: | EN |
| Publié: |
MDPI AG
2021
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| Sujets: | |
| Accès en ligne: | https://doaj.org/article/00fc41f141dc4412a5e4a2a3aa82276b |
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