Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits

Fabricating defect-free micro- and nano-circuits over large scales with controlled interconnections remains a challenge. Here, Bollani et al. show a dewetting strategy for engineering arrays of parallel Si-based nanowires up to 0.75 mm and complex interconnected circuits of monocrystalline Si on a c...

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Autores principales:	Monica Bollani, Marco Salvalaglio, Abdennacer Benali, Mohammed Bouabdellaoui, Meher Naffouti, Mario Lodari, Stefano Di Corato, Alexey Fedorov, Axel Voigt, Ibtissem Fraj, Luc Favre, Jean Benoit Claude, David Grosso, Giuseppe Nicotra, Antonio Mio, Antoine Ronda, Isabelle Berbezier, Marco Abbarchi
Formato:	article
Lenguaje:	EN
Publicado:	Nature Portfolio 2019
Materias:	Science Q
Acceso en línea:	https://doaj.org/article/21de977ef4894f20829d7bd10b3c7fe3
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spelling	oai:doaj.org-article:21de977ef4894f20829d7bd10b3c7fe32021-12-02T14:39:19ZTemplated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits10.1038/s41467-019-13371-32041-1723https://doaj.org/article/21de977ef4894f20829d7bd10b3c7fe32019-12-01T00:00:00Zhttps://doi.org/10.1038/s41467-019-13371-3https://doaj.org/toc/2041-1723Fabricating defect-free micro- and nano-circuits over large scales with controlled interconnections remains a challenge. Here, Bollani et al. show a dewetting strategy for engineering arrays of parallel Si-based nanowires up to 0.75 mm and complex interconnected circuits of monocrystalline Si on a chip.Monica BollaniMarco SalvalaglioAbdennacer BenaliMohammed BouabdellaouiMeher NaffoutiMario LodariStefano Di CoratoAlexey FedorovAxel VoigtIbtissem FrajLuc FavreJean Benoit ClaudeDavid GrossoGiuseppe NicotraAntonio MioAntoine RondaIsabelle BerbezierMarco AbbarchiNature PortfolioarticleScienceQENNature Communications, Vol 10, Iss 1, Pp 1-10 (2019)
institution	DOAJ
collection	DOAJ
language	EN
topic	Science Q
spellingShingle	Science Q Monica Bollani Marco Salvalaglio Abdennacer Benali Mohammed Bouabdellaoui Meher Naffouti Mario Lodari Stefano Di Corato Alexey Fedorov Axel Voigt Ibtissem Fraj Luc Favre Jean Benoit Claude David Grosso Giuseppe Nicotra Antonio Mio Antoine Ronda Isabelle Berbezier Marco Abbarchi Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits
description	Fabricating defect-free micro- and nano-circuits over large scales with controlled interconnections remains a challenge. Here, Bollani et al. show a dewetting strategy for engineering arrays of parallel Si-based nanowires up to 0.75 mm and complex interconnected circuits of monocrystalline Si on a chip.
format	article
author	Monica Bollani Marco Salvalaglio Abdennacer Benali Mohammed Bouabdellaoui Meher Naffouti Mario Lodari Stefano Di Corato Alexey Fedorov Axel Voigt Ibtissem Fraj Luc Favre Jean Benoit Claude David Grosso Giuseppe Nicotra Antonio Mio Antoine Ronda Isabelle Berbezier Marco Abbarchi
author_facet	Monica Bollani Marco Salvalaglio Abdennacer Benali Mohammed Bouabdellaoui Meher Naffouti Mario Lodari Stefano Di Corato Alexey Fedorov Axel Voigt Ibtissem Fraj Luc Favre Jean Benoit Claude David Grosso Giuseppe Nicotra Antonio Mio Antoine Ronda Isabelle Berbezier Marco Abbarchi
author_sort	Monica Bollani
title	Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits
title_short	Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits
title_full	Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits
title_fullStr	Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits
title_full_unstemmed	Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits
title_sort	templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits
publisher	Nature Portfolio
publishDate	2019
url	https://doaj.org/article/21de977ef4894f20829d7bd10b3c7fe3
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Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits

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