Racing BIKE: Improved Polynomial Multiplication and Inversion in Hardware
BIKE is a Key Encapsulation Mechanism selected as an alternate candidate in NIST’s PQC standardization process, in which performance plays a significant role in the third round. This paper presents FPGA implementations of BIKE with the best area-time performance reported in literature. We optimize...
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| Auteurs principaux: | , , , |
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| Format: | article |
| Langue: | EN |
| Publié: |
Ruhr-Universität Bochum
2021
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| Accès en ligne: | https://doaj.org/article/2e316b33aa4143dcb95734bcd0b41ecd |
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