Silicon CMOS architecture for a spin-based quantum computer
Realisation of large-scale quantum computation requires both error correction capability and a large number of qubits. Here, the authors propose to use a CMOS-compatible architecture featuring a spin qubit surface code and individual qubit control via floating memory gate electrodes.
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| Main Authors: | , , , |
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| Format: | article |
| Language: | EN |
| Published: |
Nature Portfolio
2017
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| Subjects: | |
| Online Access: | https://doaj.org/article/53975e69be2e4da4a7d56b8f410a4bf2 |
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| Summary: | Realisation of large-scale quantum computation requires both error correction capability and a large number of qubits. Here, the authors propose to use a CMOS-compatible architecture featuring a spin qubit surface code and individual qubit control via floating memory gate electrodes. |
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