Different JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs
Both large current capability and strong short-circuit (SC) ruggedness are necessary for 3.3 kV SiC MOSFETs to improve system efficiency and reduce costs in industrial and traction applications. In this paper, the effects of Junction Field Effect Transistor (JFET) region width and JFET doping (JD) o...
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oai:doaj.org-article:71ecac5e3fd54c4b87308cab2710b01c2021-11-19T00:01:58ZDifferent JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs2168-673410.1109/JEDS.2020.3010951https://doaj.org/article/71ecac5e3fd54c4b87308cab2710b01c2020-01-01T00:00:00Zhttps://ieeexplore.ieee.org/document/9146623/https://doaj.org/toc/2168-6734Both large current capability and strong short-circuit (SC) ruggedness are necessary for 3.3 kV SiC MOSFETs to improve system efficiency and reduce costs in industrial and traction applications. In this paper, the effects of Junction Field Effect Transistor (JFET) region width and JFET doping (JD) on conduction and SC capability of the 3.3 kV planar-gate SiC MOSFETs are systematically investigated by experiments and simulations. When the JFET width (W<sub>JFET</sub>) of device without JD is smaller, the positive temperature coefficient of the special on-resistance (R<sub>on,SP</sub>) is larger. The JD is effective to improve the R<sub>on,SP</sub>, but excessive electric field in gate oxide induced by JD should be paid more attention. The optimization of W<sub>JFET</sub> can be used to improve both R<sub>on,SP</sub> and short circuit withstanding time (SCWT) at the same time. The drain-source current (I<sub>ds</sub>) and SCWT of the optimized devices are 50 A and more than <inline-formula> <tex-math notation="LaTeX">$20~{\mu }\text{s}$ </tex-math></inline-formula>, respectively, which is state-of-the-art for 3.3 kV SiC MOSFETs.Ximing ChenXuan LiYafei WangHong ChenCaineng ZhouChao ZhangChengzhan LiXiaochuan DengYudong WuBo ZangIEEEarticleSiC MOSFETJFET widthJFET dopingshort circuitElectrical engineering. Electronics. Nuclear engineeringTK1-9971ENIEEE Journal of the Electron Devices Society, Vol 8, Pp 841-845 (2020) |
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SiC MOSFET JFET width JFET doping short circuit Electrical engineering. Electronics. Nuclear engineering TK1-9971 |
| spellingShingle |
SiC MOSFET JFET width JFET doping short circuit Electrical engineering. Electronics. Nuclear engineering TK1-9971 Ximing Chen Xuan Li Yafei Wang Hong Chen Caineng Zhou Chao Zhang Chengzhan Li Xiaochuan Deng Yudong Wu Bo Zang Different JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs |
| description |
Both large current capability and strong short-circuit (SC) ruggedness are necessary for 3.3 kV SiC MOSFETs to improve system efficiency and reduce costs in industrial and traction applications. In this paper, the effects of Junction Field Effect Transistor (JFET) region width and JFET doping (JD) on conduction and SC capability of the 3.3 kV planar-gate SiC MOSFETs are systematically investigated by experiments and simulations. When the JFET width (W<sub>JFET</sub>) of device without JD is smaller, the positive temperature coefficient of the special on-resistance (R<sub>on,SP</sub>) is larger. The JD is effective to improve the R<sub>on,SP</sub>, but excessive electric field in gate oxide induced by JD should be paid more attention. The optimization of W<sub>JFET</sub> can be used to improve both R<sub>on,SP</sub> and short circuit withstanding time (SCWT) at the same time. The drain-source current (I<sub>ds</sub>) and SCWT of the optimized devices are 50 A and more than <inline-formula> <tex-math notation="LaTeX">$20~{\mu }\text{s}$ </tex-math></inline-formula>, respectively, which is state-of-the-art for 3.3 kV SiC MOSFETs. |
| format |
article |
| author |
Ximing Chen Xuan Li Yafei Wang Hong Chen Caineng Zhou Chao Zhang Chengzhan Li Xiaochuan Deng Yudong Wu Bo Zang |
| author_facet |
Ximing Chen Xuan Li Yafei Wang Hong Chen Caineng Zhou Chao Zhang Chengzhan Li Xiaochuan Deng Yudong Wu Bo Zang |
| author_sort |
Ximing Chen |
| title |
Different JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs |
| title_short |
Different JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs |
| title_full |
Different JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs |
| title_fullStr |
Different JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs |
| title_full_unstemmed |
Different JFET Designs on Conduction and Short-Circuit Capability for 3.3 kV Planar-Gate Silicon Carbide MOSFETs |
| title_sort |
different jfet designs on conduction and short-circuit capability for 3.3 kv planar-gate silicon carbide mosfets |
| publisher |
IEEE |
| publishDate |
2020 |
| url |
https://doaj.org/article/71ecac5e3fd54c4b87308cab2710b01c |
| work_keys_str_mv |
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