CMOS-compatible synaptic transistor gated by chitosan electrolyte-Ta2O5 hybrid electric double layer
Abstract This study proposes a hybrid electric double layer (EDL) with complementary metal-oxide semiconductor (CMOS) process compatibility by stacking a chitosan electrolyte and a Ta2O5 high-k dielectric thin film. Bio-inspired synaptic transistors with excellent electrical stability were fabricate...
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| Autores principales: | , |
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| Formato: | article |
| Lenguaje: | EN |
| Publicado: |
Nature Portfolio
2020
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| Materias: | |
| Acceso en línea: | https://doaj.org/article/73c82aed11704c388acfb6091cbb502a |
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