FPGA Implementation of IEC-61131-3-Based Hardware Aided Counters for PLC
The article discusses counters defined in the IEC 61131-3 standard. The possible implementations of standard counters function blocks in FPGAs are presented. First, counters are implemented as classical hardware-based modules. Second, counters are designed as the FPGA built-in memory blocks with a s...
Saved in:
Main Authors: | Miroslaw Chmiel, Robert Czerwinski, Andrzej Malcher |
---|---|
Format: | article |
Language: | EN |
Published: |
MDPI AG
2021
|
Subjects: | |
Online Access: | https://doaj.org/article/78b598c90b95431c88c62d8ff0c0a080 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Metodología para la transformación de diseños en GRAFCET a código IEC 61131-3
by: Burgos,Arantzazu, et al.
Published: (2020) -
Entorno para la Emulación de Autómatas Programables
by: Pardo,Xoán C, et al.
Published: (2006) -
Interference Signal Identification of Sensor Array Based on Convolutional Neural Network and FPGA Implementation
by: Lin Huang, et al.
Published: (2021) -
Review on FPGA-Based Accelerators in Deep Learning
by: LIU Tengda1, ZHU Junwen1, ZHANG Yiwen2+
Published: (2021) -
FPGA Implementation of Threshold-Type Binary Memristor and Its Application in Logic Circuit Design
by: Liu Yang, et al.
Published: (2021)