Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS
This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (PLL) and Clock and Data Recovery (CDR) circuit for wireline communication applications. Several radiation hardening techniques are proposed to achieve state-of-the-art immunity to Single-Event Effects (S...
Enregistré dans:
| Auteurs principaux: | , , , , , |
|---|---|
| Format: | article |
| Langue: | EN |
| Publié: |
MDPI AG
2021
|
| Sujets: | |
| Accès en ligne: | https://doaj.org/article/876fa46e37a041b690ea5a9954a41008 |
| Tags: |
Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!
|