Radiation-Tolerant All-Digital PLL/CDR with Varactorless LC DCO in 65 nm CMOS
This paper presents the first fully integrated radiation-tolerant All-Digital Phase-Locked Loop (PLL) and Clock and Data Recovery (CDR) circuit for wireline communication applications. Several radiation hardening techniques are proposed to achieve state-of-the-art immunity to Single-Event Effects (S...
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| Autores principales: | , , , , , |
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| Formato: | article |
| Lenguaje: | EN |
| Publicado: |
MDPI AG
2021
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| Materias: | |
| Acceso en línea: | https://doaj.org/article/876fa46e37a041b690ea5a9954a41008 |
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