Design of universal convolutional layer IP core based on FPGA
Aiming at the problems of insufficient computing speed and poor portability in the miniaturization and parallelization of convolutional neural network,this paper proposes a design of high-speed universal convolutional layer IP core using VHDL language based on the characteristics of convolutional ne...
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| Autores principales: | , , , , |
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| Formato: | article |
| Lenguaje: | ZH |
| Publicado: |
Hebei University of Science and Technology
2021
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| Materias: | |
| Acceso en línea: | https://doaj.org/article/8b62227a47d046a5af79d9621ec59363 |
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