A 9-Bit 1-GS/s Hybrid-Domain Pseudo-Pipelined SAR ADC Based on Variable Gain VTC and Segmented TDC
This paper presents a 9-bit 1 GS/s successive approximation register (SAR) analog-to-digital converter (ADC). In this hybrid architecture, the pseudo-pipeline operation is realized, which increases the sampling rate effectively. The ADC adopts two key technologies: the variable gain voltage-to-time...
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| Autores principales: | , , , , , , , |
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| Formato: | article |
| Lenguaje: | EN |
| Publicado: |
MDPI AG
2021
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| Materias: | |
| Acceso en línea: | https://doaj.org/article/982fb08a11f44c34bb2a4a4155d0210d |
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