A 9-Bit 1-GS/s Hybrid-Domain Pseudo-Pipelined SAR ADC Based on Variable Gain VTC and Segmented TDC

This paper presents a 9-bit 1 GS/s successive approximation register (SAR) analog-to-digital converter (ADC). In this hybrid architecture, the pseudo-pipeline operation is realized, which increases the sampling rate effectively. The ADC adopts two key technologies: the variable gain voltage-to-time...

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Detalles Bibliográficos
Autores principales:	Suping Bai, Zhi Wan, Peiyuan Wan, Hongda Zhang, Yongkuo Ma, Xiaoyu Zhang, Xu Liu, Zhijie Chen
Formato:	article
Lenguaje:	EN
Publicado:	MDPI AG 2021
Materias:	analog-to-digital converter (ADC) hybrid-domain quantization high speed voltage-to-time converter (VTC) time-to-digital converter (TDC) Electronics TK7800-8360
Acceso en línea:	https://doaj.org/article/982fb08a11f44c34bb2a4a4155d0210d
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A 9-Bit 1-GS/s Hybrid-Domain Pseudo-Pipelined SAR ADC Based on Variable Gain VTC and Segmented TDC

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