Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment
Improved electrical characteristics of CMOS inverters composed of Ge n- and p-finFETs were demonstrated by utilizing newly introduced Ge surface treatments. <italic>In-situ</italic> digital O<sub>3</sub> treatment in ALD chamber was adopted on the surface of Ge fin sidewall i...
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oai:doaj.org-article:a5f5f525abe24ceda9f3e6d0178335bc2021-11-19T00:00:49ZGe FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment2168-673410.1109/JEDS.2018.2878929https://doaj.org/article/a5f5f525abe24ceda9f3e6d0178335bc2018-01-01T00:00:00Zhttps://ieeexplore.ieee.org/document/8519615/https://doaj.org/toc/2168-6734Improved electrical characteristics of CMOS inverters composed of Ge n- and p-finFETs were demonstrated by utilizing newly introduced Ge surface treatments. <italic>In-situ</italic> digital O<sub>3</sub> treatment in ALD chamber was adopted on the surface of Ge fin sidewall in order to reduce the roughness and etching damages through the GeO desorption mechanism. The treatment effects were checked by AFM and C-V measurements. By combining this treatment with optimized microwave annealing, sub-threshold slope and the <inline-formula> <tex-math notation="LaTeX">$\text{I}_{\mathrm{ ON}}/\text{I}_{\mathrm{ OFF}}$ </tex-math></inline-formula> ratio were remarkably improved in both n-finFET and p-finFET, and Ge CMOS inverters with high voltage gain of 50.3 V/V at low <inline-formula> <tex-math notation="LaTeX">${V}_{D}= 0.6$ </tex-math></inline-formula> V was realized. Finally, simulations on an ideal Ge CMOS inverter were presented.M.-S. YehG.-L. LuoF.-J. HouP.-J. SungC. J. WangC.-J. SuC.-T. WUY.-C. HuangT.-C. HongB.-Y. ChenK.-M. ChenY.-C. WUM. IzawaM. MiuraM. MorimotoH. IshimuraY.-J. LeeW.-F. WuW.-K. YehIEEEarticleALD high-k<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">in-situ</italic> digital ozone treatment (IDOT)CMOSFinFETgermaniuminvertersElectrical engineering. Electronics. Nuclear engineeringTK1-9971ENIEEE Journal of the Electron Devices Society, Vol 6, Pp 1227-1232 (2018) |
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ALD high-k <italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">in-situ</italic> digital ozone treatment (IDOT) CMOS FinFET germanium inverters Electrical engineering. Electronics. Nuclear engineering TK1-9971 |
| spellingShingle |
ALD high-k <italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">in-situ</italic> digital ozone treatment (IDOT) CMOS FinFET germanium inverters Electrical engineering. Electronics. Nuclear engineering TK1-9971 M.-S. Yeh G.-L. Luo F.-J. Hou P.-J. Sung C. J. Wang C.-J. Su C.-T. WU Y.-C. Huang T.-C. Hong B.-Y. Chen K.-M. Chen Y.-C. WU M. Izawa M. Miura M. Morimoto H. Ishimura Y.-J. Lee W.-F. Wu W.-K. Yeh Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment |
| description |
Improved electrical characteristics of CMOS inverters composed of Ge n- and p-finFETs were demonstrated by utilizing newly introduced Ge surface treatments. <italic>In-situ</italic> digital O<sub>3</sub> treatment in ALD chamber was adopted on the surface of Ge fin sidewall in order to reduce the roughness and etching damages through the GeO desorption mechanism. The treatment effects were checked by AFM and C-V measurements. By combining this treatment with optimized microwave annealing, sub-threshold slope and the <inline-formula> <tex-math notation="LaTeX">$\text{I}_{\mathrm{ ON}}/\text{I}_{\mathrm{ OFF}}$ </tex-math></inline-formula> ratio were remarkably improved in both n-finFET and p-finFET, and Ge CMOS inverters with high voltage gain of 50.3 V/V at low <inline-formula> <tex-math notation="LaTeX">${V}_{D}= 0.6$ </tex-math></inline-formula> V was realized. Finally, simulations on an ideal Ge CMOS inverter were presented. |
| format |
article |
| author |
M.-S. Yeh G.-L. Luo F.-J. Hou P.-J. Sung C. J. Wang C.-J. Su C.-T. WU Y.-C. Huang T.-C. Hong B.-Y. Chen K.-M. Chen Y.-C. WU M. Izawa M. Miura M. Morimoto H. Ishimura Y.-J. Lee W.-F. Wu W.-K. Yeh |
| author_facet |
M.-S. Yeh G.-L. Luo F.-J. Hou P.-J. Sung C. J. Wang C.-J. Su C.-T. WU Y.-C. Huang T.-C. Hong B.-Y. Chen K.-M. Chen Y.-C. WU M. Izawa M. Miura M. Morimoto H. Ishimura Y.-J. Lee W.-F. Wu W.-K. Yeh |
| author_sort |
M.-S. Yeh |
| title |
Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment |
| title_short |
Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment |
| title_full |
Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment |
| title_fullStr |
Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment |
| title_full_unstemmed |
Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment |
| title_sort |
ge finfet cmos inverters with improved channel surface roughness by using <italic>in-situ</italic> ald digital o<sub>3</sub> treatment |
| publisher |
IEEE |
| publishDate |
2018 |
| url |
https://doaj.org/article/a5f5f525abe24ceda9f3e6d0178335bc |
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