Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM

Static random-access memory (SRAM) is an essential component for realizing large-scale integration (LSI). The future transition to a 48 V DC supply in datacenters and electric vehicles acting as mobile edge servers will increase the demand for a bipolar-complementary metal-oxide semiconductor-double...

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Autores principales:	Kazunari Ishimaru, Mizuki Tamura, Osamu Fujii
Formato:	article
Lenguaje:	EN
Publicado:	IEEE 2021
Materias:	Defect mechanical stress SRAM Electrical engineering. Electronics. Nuclear engineering TK1-9971
Acceso en línea:	https://doaj.org/article/a7cd4cb446024bef9d857380960ef138
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spelling	oai:doaj.org-article:a7cd4cb446024bef9d857380960ef1382021-11-25T00:00:14ZAnalysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM2168-673410.1109/JEDS.2021.3127953https://doaj.org/article/a7cd4cb446024bef9d857380960ef1382021-01-01T00:00:00Zhttps://ieeexplore.ieee.org/document/9614349/https://doaj.org/toc/2168-6734Static random-access memory (SRAM) is an essential component for realizing large-scale integration (LSI). The future transition to a 48 V DC supply in datacenters and electric vehicles acting as mobile edge servers will increase the demand for a bipolar-complementary metal-oxide semiconductor-double diffused metal-oxide semiconductor with high-capacity SRAM. When we scaled and optimized an SRAM cell from 130 nm nodes to 90 nm nodes, we observed the generation of crystal defects induced by mechanical stress in the p-channel MOS active area that cannot be explained by previous models. We performed simulations using the finite element method to identify the mechanism. In our results, the edge of the narrow active area showed a large deformation compared to the middle of the active area, which can be attributed to compressive stress from the gate electrode and sidewall. The cell layout and sidewall structure were optimized to suppress this defect generation while satisfying reliability requirements, and the design can be extended to 65 nm nodes.Kazunari IshimaruMizuki TamuraOsamu FujiiIEEEarticleDefectmechanical stressSRAMElectrical engineering. Electronics. Nuclear engineeringTK1-9971ENIEEE Journal of the Electron Devices Society, Vol 9, Pp 1103-1109 (2021)
institution	DOAJ
collection	DOAJ
language	EN
topic	Defect mechanical stress SRAM Electrical engineering. Electronics. Nuclear engineering TK1-9971
spellingShingle	Defect mechanical stress SRAM Electrical engineering. Electronics. Nuclear engineering TK1-9971 Kazunari Ishimaru Mizuki Tamura Osamu Fujii Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM
description	Static random-access memory (SRAM) is an essential component for realizing large-scale integration (LSI). The future transition to a 48 V DC supply in datacenters and electric vehicles acting as mobile edge servers will increase the demand for a bipolar-complementary metal-oxide semiconductor-double diffused metal-oxide semiconductor with high-capacity SRAM. When we scaled and optimized an SRAM cell from 130 nm nodes to 90 nm nodes, we observed the generation of crystal defects induced by mechanical stress in the p-channel MOS active area that cannot be explained by previous models. We performed simulations using the finite element method to identify the mechanism. In our results, the edge of the narrow active area showed a large deformation compared to the middle of the active area, which can be attributed to compressive stress from the gate electrode and sidewall. The cell layout and sidewall structure were optimized to suppress this defect generation while satisfying reliability requirements, and the design can be extended to 65 nm nodes.
format	article
author	Kazunari Ishimaru Mizuki Tamura Osamu Fujii
author_facet	Kazunari Ishimaru Mizuki Tamura Osamu Fujii
author_sort	Kazunari Ishimaru
title	Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM
title_short	Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM
title_full	Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM
title_fullStr	Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM
title_full_unstemmed	Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM
title_sort	analysis and optimization of defect generation due to mechanical stress in high-density sram
publisher	IEEE
publishDate	2021
url	https://doaj.org/article/a7cd4cb446024bef9d857380960ef138
work_keys_str_mv	AT kazunariishimaru analysisandoptimizationofdefectgenerationduetomechanicalstressinhighdensitysram AT mizukitamura analysisandoptimizationofdefectgenerationduetomechanicalstressinhighdensitysram AT osamufujii analysisandoptimizationofdefectgenerationduetomechanicalstressinhighdensitysram
_version_	1718414712312430592

Analysis and Optimization of Defect Generation Due to Mechanical Stress in High-Density SRAM

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