APA (7th ed.) Citation

Yadav, N., Kim, Y., Li, S., & Choi, K. K. (2021). Stable, Low Power and Bit-Interleaving Aware SRAM Memory for Multi-Core Processing Elements. MDPI AG.

Chicago Style (17th ed.) Citation

Yadav, Nandakishor, Youngbae Kim, Shuai Li, and Kyuwon Ken Choi. Stable, Low Power and Bit-Interleaving Aware SRAM Memory for Multi-Core Processing Elements. MDPI AG, 2021.

MLA (8th ed.) Citation

Yadav, Nandakishor, et al. Stable, Low Power and Bit-Interleaving Aware SRAM Memory for Multi-Core Processing Elements. MDPI AG, 2021.