Efficient design of 15:4 counter using a novel 5:3 counter for high‐speed multiplication
Abstract This paper proposes an efficient approach to design high‐speed, accurate multipliers. The proposed multiplier design uses the proposed efficient 15:4 counter for the partial product reduction stage. This proposed 15:4 counter is designed using a novel 5:3 counter. The proposed 5:3 counter u...
Enregistré dans:
| Auteurs principaux: | , , , , |
|---|---|
| Format: | article |
| Langue: | EN |
| Publié: |
Wiley
2021
|
| Sujets: | |
| Accès en ligne: | https://doaj.org/article/bdef7fe206c14673bb77006988bfdbfd |
| Tags: |
Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!
|