Sparse and dense matrix multiplication hardware for heterogeneous multi-precision neural networks

In this paper, we present hardware accelerators created with high-level synthesis techniques for sparse and dense matrix multiplication operations. The cores can operate with different precisions and are designed to be integrated in a heterogeneous CPU-FPGA system for Edge AI applications. The metho...

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Autores principales: Jose Nunez-Yanez, Mohammad Hosseinabady
Formato: article
Lenguaje:EN
Publicado: Elsevier 2021
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Acceso en línea:https://doaj.org/article/dd166273a0504d5681c710bd4c82c5be
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