An SRAM Compiler for Monolithic-3-D Integrated Circuit With Carbon Nanotube Transistors
This article presents monolithic-3-D (M3D) SRAM arrays using multiple tiers of carbon nanotube (CNT) transistors. The compiler automatically generates single-tier 2-D SRAM subarrays and multitier 3-D SRAM subarrays with different tiers for cells and peripheral logic. Moreover, the compiler can integ...
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| Main Authors: | , , , , , |
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| Format: | article |
| Language: | EN |
| Published: |
IEEE
2021
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| Subjects: | |
| Online Access: | https://doaj.org/article/df1b2c62224146cda435cc567414f305 |
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